Just about everything about Red Pitaya
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Wi-Fi configuration with Alpine Linux
1, 2 by pavel Wed Nov 29, 2017 3:14 pm
16 Replies
404 Views
by amin
Sat Dec 02, 2017 6:02 am
Red Pitaya for CAN based instrument
by Karikalan Thu Nov 02, 2017 1:27 pm
1 Replies
189 Views
by JB
Mon Nov 27, 2017 7:05 am
Controlling the DAC output
by blevlab Fri Sep 30, 2016 3:05 am
6 Replies
1803 Views
by amin
Sat Nov 25, 2017 5:48 am
Writing AXI stream data to DRAM
by parveen Sat Nov 18, 2017 9:09 am
1 Replies
151 Views
by JB
Thu Nov 23, 2017 5:46 pm
Will redpitaya be suitable?
by MateoConLechuga Tue Nov 07, 2017 6:22 pm
2 Replies
293 Views
by JB
Fri Nov 17, 2017 10:12 am
Cant Connect over Direct lan ?
by Losspost Sun Nov 12, 2017 11:23 pm
0 Replies
137 Views
by Losspost
Sun Nov 12, 2017 11:23 pm
Will redpitaya do my job?
by Mr_Duck Thu Nov 02, 2017 11:27 am
1 Replies
195 Views
by JohnnyMalaria
Sun Nov 05, 2017 12:14 am
128k sample single channel generation
by eebbhh Fri Sep 15, 2017 7:57 pm
3 Replies
325 Views
by amike88
Thu Nov 02, 2017 11:52 am
Will redpitaya do my job?
by Mr_Duck Thu Nov 02, 2017 11:27 am
0 Replies
99 Views
by Mr_Duck
Thu Nov 02, 2017 11:27 am
ADC data to DDR ring buffer speed
by JohnDobbins Thu Aug 17, 2017 2:42 pm
1 Replies
358 Views
by JB
Tue Oct 31, 2017 10:05 am
SCPI & LabView Problems with the Generator function
by Sahitaz Thu Oct 19, 2017 10:12 am
1 Replies
189 Views
by amike88
Mon Oct 23, 2017 12:09 pm
Problem: corrupted output signal on channel 2 in jupyter
by Hinkestein Fri Sep 22, 2017 8:41 pm
4 Replies
427 Views
by Hinkestein
Fri Oct 20, 2017 6:44 pm
Problems with fully bandwidth on DAC and ADC
by EMsoft Wed Oct 11, 2017 12:57 pm
2 Replies
371 Views
by gmb
Thu Oct 19, 2017 9:50 pm
Developing on RP without internet access
by mnordgard Tue Oct 03, 2017 1:10 pm
3 Replies
373 Views
by lene85
Mon Oct 09, 2017 11:58 am
how to acquire signal when external trigger come in labview
by yadavnitin365@gmail.com Wed Oct 04, 2017 7:27 am
0 Replies
176 Views
by yadavnitin365@gmail.com
Wed Oct 04, 2017 7:27 am
LCR Meter
by Steinbeis_EST Tue Jul 18, 2017 2:41 pm
3 Replies
627 Views
by wira
Tue Oct 03, 2017 8:01 am
Changing IP address in Redpitaya
by jdgomez Wed Oct 26, 2016 5:01 am
3 Replies
2331 Views
by amike88
Fri Sep 22, 2017 2:59 pm
FORUM & MARKETPLACE maintenance
by redpitaya Mon Aug 07, 2017 2:27 pm
6 Replies
1280 Views
by ON7YI
Thu Sep 21, 2017 8:31 am
SPI Interfacing from Pins to FPGA PLL Modules
by patrick_stockton Thu Sep 14, 2017 11:56 pm
2 Replies
291 Views
by pstockton
Wed Sep 20, 2017 10:04 pm
High Level Synthesis, low level I/O, and the RP
by lhochstetter Sun May 21, 2017 2:09 pm
2 Replies
700 Views
by lhochstetter
Mon Sep 18, 2017 4:07 pm
Signals from an external signal generator to Red Pitaya
by vaishsuri Mon Sep 04, 2017 12:02 pm
0 Replies
182 Views
by vaishsuri
Mon Sep 04, 2017 12:02 pm
Problems
by avlredpitaya Wed Aug 23, 2017 7:22 am
1 Replies
396 Views
by redpitaya
Thu Aug 31, 2017 10:23 am
RedPitaya-master project FPGA for VIVADO design recompiling?
by downunderthunder123 Tue Aug 08, 2017 3:45 pm
1 Replies
439 Views
by amike88
Mon Aug 28, 2017 9:11 am
C Compiling Problems
by jromano Wed Aug 23, 2017 6:30 pm
0 Replies
262 Views
by jromano
Wed Aug 23, 2017 6:30 pm
Pulse generation problems
by Jackk Wed Aug 16, 2017 4:19 pm
2 Replies
372 Views
by JohnnyMalaria
Tue Aug 22, 2017 2:57 am

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