ADC Data Through AXIs

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AstroJimX
Posts: 58
Joined: Wed Jan 13, 2016 12:57 am

ADC Data Through AXIs

Post by AstroJimX » Wed Jul 06, 2016 7:36 pm

@ red_pitaya_scope.v, line 347-351

Why the need of overlaying the same 14-bit adc_a_dat data on 16-bit chunks of the 64-bit axi_a_dat reg?
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Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: ADC Data Through AXIs

Post by Nils Roos » Wed Jul 06, 2016 11:53 pm

It is not the same data, each cycle there is a new sample on adc_a_dat, and each cycle, axi_a_dat_sel counts up, so consecutive samples will be put into ascending 16bit slots of the 64bit wide AXI data bus register. When 4 samples have been put into the register, the assembled 64bits are forwarded to the AXI bus.
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