Communication between PS-PL: Send trigger and send/read data

[carlos.e.teixeira]

Hi everyone!

I'm trying to implement a basic application with my Red Pitaya using the fast analog input.
I would like to start the acquisition after a trigger signal coming from the linux side, through a c-code for instance.
After that, the acquired data must return to the linux side for processing.
Finally, based on the results obtained, I would like to send some digital signals to the GPIO (located in the on-board expansion connector E1.)

I already know that this communication - between Linux and FPGA (in other words, between PS and PL) - is performed by AXI interfaces. Also, I know that to read and send data or commands, it is necessary to map the memory (I supposed that after reading Anton Potočnik's tutorial (http://antonpotocnik.com. I take this opportunity to congratulate him for his posts.

My questions are...
1) Which is the minimum project on Vivado? I mean, which modules/IPs are necessary for this purpose? I know it seems a dummy question, but I have some difficulties concerning AXI Interfaces. I keep reading, but I'm still in doubt.

2) How can I implement this communication in the PS side, through a simple C-code. How can I send the trigger signal, read the acquired data and send some digital values to GPIOs?

If my questions take so much time, could you recommend any tutorial/document (e.g., video, book, etc.) to read?

Thanks in advance and sorry for any inconvenience!

[Nils Roos]

Hi Carlos,

1) Which is the minimum project on Vivado? I mean, which modules/IPs are necessary for this purpose? I know it seems a dummy question, but I have some difficulties concerning AXI Interfaces. I keep reading, but I'm still in doubt.

The communication between a C program and the FPGA modules is handled over the AXI GP0 master interface. The HDL files involved (for the project 'classic') are:

• fpga/rtl/interface/axi4_if.sv
• fpga/rtl/interface/sys_bus_if.sv
• fpga/rtl/axi4_slave.sv
• fpga/rtl/red_pitaya_pll.sv
• fpga/prj/classic/rtl/red_pitaya_top.sv
• fpga/prj/classic/rtl/red_pitaya_ps.sv
• IP processing_system7

2) How can I implement this communication in the PS side, through a simple C-code. How can I send the trigger signal, read the acquired data and send some digital values to GPIOs?

The RP api (api/rpbase/src/*) does all these things, so you could either use it or look into it for 'inspiration'.