So, I want to make a design that requires no software; Feed the ADC with 1MHz sine wave, average the signal and feed it to the dac, which is connected to my oscilloscope. The block design I made is attached. Everything runs with a 50 MHz clock. Creating the wrapper and output products, and up to the implementation stage everything is ok, but the bitstream is not generated because it says some ports must be specified to avoid contention, regarding the DAC IP
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ERROR: [DRC 23-20] Rule violation (NSTD-1) Unspecified I/O standard - 18 out of 148 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of user assigned specific value
Anyone please could explain what is happening? And also is my design correct as I have perceived it should work?
Johnny