Slight Frequency Drift

Applications, development tools, FPGA, C, WEB
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tknopp
Posts: 26
Joined: Thu Feb 09, 2017 1:13 pm

Slight Frequency Drift

Post by tknopp » Mon May 08, 2017 12:35 pm

Hi,

I have a problem to correctly set the frequency such that it correct:

What I am doing is continuously sending and acquiring data on the CPU by monitoring the write buffer and copying the data into RAM, from which it is forwarded via TCP. Since the CPU is too slow I am using a decimation of 64 which works pretty good.

I need to have a frequency "around" 25kHz. To match this to the discrete setting I use the frequency:

125 MHz / 64 / 78 = 25040.0641025641...

Thus, one period has 78 samples. I also set the frequency using "rp_GenFreq(RP_CH_1, 125e6 / 64 / 78 );". When looking at the signal it seems to match quite well with no discontinuity. However, when I measure for some seconds I observe that the phase of the signal has shifted by several degrees in one second. Has somebody an idea what I am doing wrong? Is there a better way to have a fully synchronous loop?

Thanks
Tobias

JamesW
Posts: 12
Joined: Mon May 30, 2016 6:40 am

Re: Slight Frequency Drift

Post by JamesW » Sat May 27, 2017 12:25 pm

Hello,
the generator use fixed point number for step in FPGA with 16 bit after point. This limits precision of output frequenci. Maximum error is 58.2 mHz for buffer length 16384 samples.
If you use shorter buffer you can adjust precision. If you use only 16380 samples for generating buffer then it should pefectly match to 125MHz/64/78.

tknopp
Posts: 26
Joined: Thu Feb 09, 2017 1:13 pm

Re: Slight Frequency Drift

Post by tknopp » Sun May 28, 2017 9:12 pm

yes thanks, this is also what I have found out after reading through the API source code. I now use the custom waveform and use a shorter buffer.

I actually think that the API is not perfect in this area. The setFreq method should actually allow me to specify the number of samples, the waveform should be long.

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