Great to hear that it is working as expected!
Thank you for mentioning the solution. This will help other users with the same problem.
Good luck with your projects!
Generation of a signal from a trigger
- redpitaya
- Site Admin
- Posts: 912
- Joined: Wed Mar 26, 2014 7:04 pm
-
- Posts: 12
- Joined: Wed Sep 13, 2023 12:46 pm
Re: Generation of a signal from a trigger
Good afternoon,redpitaya wrote: ↑Fri Oct 20, 2023 11:50 amHello TheGeri,
I will check this out.
If you are using the 2.00 OS version, I apologise. I thought that the 2.00 FGPA update was already applied to the tutorials, however, I double-checked and noticed that I forgot to merge it with the main branch. Anyway, the tutorials should be updated for the 2.00 OS now:
https://redpitaya-knowledge-base.readth ... s/top.html
Have you been able to investigate the case of the error I mentioned, where the Vivado program was closed during synthesis process? Following the procedure from this example: https://redpitaya-knowledge-base.readth ... Rider.html I encounter the same problem, and the Vivado program closes. I should mention that I also modified the make_project.tcl file in the /RedPitaya-FPGA/prj/Examples folder to use the Knight_rider project:
Code: Select all
# Uncomment the example you want to run
#set project_name "Led_blink"
set project_name "Knight_rider"
#set project_name "Stopwatch"
#set project_name "Frequency_counter"
#set project_name "Simple_moving_average"
#set project_name "Vga_draw"
#set project_name "Vga_game"
#set project_name "Vga_image"
cd $project_name
source make_project.tcl
I appreciate any kind of help or advice. Thanks you in advance!
![Very Happy :D](./images/smilies/icon_e_biggrin.gif)
- redpitaya
- Site Admin
- Posts: 912
- Joined: Wed Mar 26, 2014 7:04 pm
Re: Generation of a signal from a trigger
Hello TheGeri,
I apologise for the late reply.
Sorry, I have been busy with other projects that needed immediate attention. I will test the functionality of all FPGA examples this week.
I apologise for the late reply.
Sorry, I have been busy with other projects that needed immediate attention. I will test the functionality of all FPGA examples this week.
jadalnie klasyczne ekskluzywne meble wypoczynkowe do salonu ekskluzywne meble tapicerowane ekskluzywne meble do sypialni ekskluzywne meble włoskie
Who is online
Users browsing this forum: No registered users and 101 guests