Reading and writing from/to memory registers

[Alexis]

Hello everyone.

I'm actually trying to make a level-crossing detector by using a "monitor-like" program.

The principle :
- I'm acquiring a sinusoidal signal (few hundreds hertz) on the analog input 0 (XADC AIF0) by reading the 2 first bytes @ 0x40400000.
- Once the value cross a specific value i want to set the GPIO's output named DIO7_P to high, else it's set to low.

Here is my code :

// I previously set the GPIO's connector direction to outputs by writing 0xFF @ 0x40000010
unsigned long value;
int level = 0;
int fd = -1;
if((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) FATAL; //Opening the file to communicate with registers

map_base_read = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0x40400000 & ~MAP_MASK); //Mapping for reading purpose on ADC0 @ 0x40400000
map_base_write = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0x40000018 & ~MAP_MASK); //Same for writing on DIO7_P @ 0x40000018

while(1) // Infinte loop for continuous processing
{
void* virt_addr = map_base_read + (0x40400000 & MAP_MASK); // Reading value from ADC0
level = *((uint32_t *) virt_addr); // I store the value in an integer
printf("%d \n",level); // Console output of the measured level

if(level >=100) {value = 0x80;} // Condition on the measured level (0x80 means 10000000 in binary)
else {value = 0x00;}

void* virt_addr2 = map_base_write + (0x40000018 & MAP_MASK);
*((unsigned long *) virt_addr2) = value; // Writing the value to GPIO DI07_P
}

Each part of the program works perfectly when taken separately, means i can read OR write the values without any issue.
The problem is when i try to do both reading and writing, the value i read on ADC0 stay stuck to 0. (Only the first reading is not null then "level" sticks to zero)
I've tried several thing (like setting the reading map to private or fixed...) but i didn't find any solution.

Any advice or suggestion is welcome knowing that i'm not an expert in FPGA, neither in programming.
Thank you very much.

Alexis

Edit : oops i may have posted this on the "software" part of the forum sorry. Feel free to move it where it belongs.

[Nils Roos]

Hi Alexis.

Ok, first the good news: you don't do anything wrong, your program should work.

The bad news is that there seems to be a bug in the FPGA code, or possibly in the XADC itself. Writing to certain registers disables the auxiliary ADC, but I can't yet see how.
It does not seem to be an mmap issue, the effect occurs even when I map the whole FPGA address range as one block. Also, only some registers trigger the misbehaviour, 40000014, 40000018, 4000001c are the only ones I found.

Thanks for bringing this to my attention. I can't give you an estimate when this matter will be resolved, but I'll let you know when there is a solution.

Cheers
Nils

[Alexis]

Hi Nils.

Thanks for your answer.

Following what u said i tried to write to other registers and it worked !
I can write to the LED registers (0x40000030) and the analog outputs (DAC0 @ 0x40400020) for example.

My "level-crossing-detector" is working well with this setup, i'll try to implement it on my real system.

Once again thanks for your reply.
See you soon on the forum

Alexis

[Nils Roos]

Just a quick update, a solution for the problem was found and is available through the Red Pitaya git repository on branch master. A new ecosystem that includes the fix is yet to be published though.

[albertryou2]

Hey Nils,

When you said there was now a fix available on the Red Pitaya repository on GitHub, did you mean a new fpga build in the folder "fpga"? A couple of weeks ago, I made the bit file after first making a .xpr (Vivado 2015.4 project), but even with that bit file, I'm still having this problem where 0x40400000 returns zero.

Actually, this seems to be a different problem from the above thread, since all the XADCs return zero when I read them, even from the start without any tinkering with the GPIOs. I can read the voltage out with SCPI, just not from the registers directly (I'm using PyRedPitaya btw). I can read other registers without any problem with PyRedPitaya.

Thanks,
Albert

[Nils Roos]

Hi Albert,

this topic deals with ecosystem versions < 0.94 (you can determin that by the date, 0.94 was released in Sep 2015). As of 0.94, the slow ADC is connected differently in the FPGA and can be accessed through a linux driver. The former memory mapped registers of the ADC at 0x40400000 have been removed.

See for example here how to use it now.

[albertryou2]

Thanks for straightening that out. The FPGA memory map I got from the wiki (dated April 2016) does have a note (dated "Avg" 2015) in the front that says that the XADC registers have been removed, but the registers are STILL shown under the AMS section just like any other register, so I didn't think much of it. I was further confused because reading the slow DACs still works just fine (I can set/read 0x4040002C and measure it with a voltmeter)!

Just for my knowledge, do you know why they got rid of the AMS memory mapping?

[Nils Roos]

The XADC was removed from the ams module, so the mapped registers did not serve any purpose anymore.
It is now connected to AXI GP1 because that way it can be handled by a Xilinx iio driver.

The DAC logic is entirely custom made, so there is no existing driver to handle it anyway. Hence, there is no advantage in removing it from ams.