I am working on a project based on the v0.94 build that requires user-defined parameters in my custom Verilog module. I achieved a proof-of-concept model a few months ago that used a barebones approach similar to the Stopwatch or Frequency Counter lessons in which I used a memory-mapped GPIO core to define the necessary parameters. However, I would like to use the v0.94 build to take advantage of the API commands to make acquisition and analysis easier. My intended solution was to write to the free register spaces in the v0.94 project (i.e., 0x4600000 to 0x46FFFFF) from the Linux or JupyerLab side and read the registers from my Verilog module. However, I do not know how to do this. I have tried to find two possible solutions, please give me suggestions or pointers:
- Is it reasonably possible to run a C file that writes to the free register spaces using the I2C protocol and then use Python for the acquisition? If not, does the team intend to add I2C functionality through Python scripts?
- As another option, could I memory map the free register spaces in v0.94 (in the same way that the GPIOs were mapped in the frequency counter lesson, but without a GPIO core) and read these from my Verilog modules?
Thank you in advance for any suggestions!