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ADC data accommodation for FFT IP

Posted: Fri Mar 29, 2024 1:53 am
by javiruni10
Hello, trying to get the ADC data (14 bits, RedPitaya 125-10) into the FFT IP and not sure what to do. The FFT IP takes a very specific type of data as input. Any insight on how to do it?

Thanks in advance.

Re: ADC data accommodation for FFT IP

Posted: Tue Apr 02, 2024 9:47 am
by juretrn
Hi,

can you link this FFT IP?

Re: ADC data accommodation for FFT IP

Posted: Thu Apr 11, 2024 4:54 pm
by javiruni10
This one: https://www.xilinx.com/support/document ... 9-xfft.pdf

Thanks for your response.

Aditionally, i have been trying on getting my own FFT, since i want to input only real data from my ADC (14 bits) and wrote some code, comprising only:

- Input data declaration
- N samples fft
- Circular convolution over the Xm FFT results. That way, X[j]= w^(i*j)*x(i). The outter loop would work over i, therefore, all X[j] would have a first element before getting the second sample (x(i+1)). The inner loop works over j.

- Twiddle factors are calculated (taken from ROM when i understand how to do it) with the product (i*j) from the previous loop. The operation ((i*j)/(N/2)) gives info both on its integer result and on its remainder. The twiddle factor for a i,j can be calculated with w^(j*i)= ((i*j)%(N/2)) and its sign defined by that same division ((i*j/(N/2)), when that division is even,+w^remainder, when it is odd, -w^remainder. That way i only need to store twiddle factors up to ((N/2)-1).

Am i missing something? Any tutorial to implement this on red pitaya? Found a couple but can't really understand what they do. Is the stage= log2(N) a better aproximation?

Thanks!