Update u-boot loader
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- Posts: 10
- Joined: Thu May 21, 2015 5:28 am
Update u-boot loader
Hi, just if somebody needs it, I've started a project to port the latest xilynx u-boot loader to boot redpitaya. I needed it to boot FreeBSD on the board. The code is here: https://github.com/sobomax/u-boot-xlnx
Build with:
make CROSS_COMPILE=arm-none-eabi- distclean
make CROSS_COMPILE=arm-none-eabi- zynq_redpitaya_config
make CROSS_COMPILE=arm-none-eabi- HOSTCC=cc
-Max
Build with:
make CROSS_COMPILE=arm-none-eabi- distclean
make CROSS_COMPILE=arm-none-eabi- zynq_redpitaya_config
make CROSS_COMPILE=arm-none-eabi- HOSTCC=cc
-Max
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- Posts: 799
- Joined: Sat May 23, 2015 5:22 pm
Re: Update u-boot loader
Hi Max,
I have a couple of additional files that I add to u-boot-xlnx (version xilinx-2015.1): lantiq.c and zynq-red-pitaya.dts. Maybe you can adapt them to your version.
The files can be found at
https://github.com/pavel-demin/red-pita ... er/patches
And I'm using the following commands to apply all the patches:
Cheers,
Pavel
I have a couple of additional files that I add to u-boot-xlnx (version xilinx-2015.1): lantiq.c and zynq-red-pitaya.dts. Maybe you can adapt them to your version.
The files can be found at
https://github.com/pavel-demin/red-pita ... er/patches
And I'm using the following commands to apply all the patches:
Code: Select all
patch -d tmp -p 0 < patches/u-boot-xlnx-xilinx-v2015.1.patch
cp patches/zynq_red_pitaya_defconfig tmp/u-boot-xlnx-xilinx-v2015.1/configs
cp patches/zynq-red-pitaya.dts tmp/u-boot-xlnx-xilinx-v2015.1/arch/arm/dts
cp patches/zynq_red_pitaya.h tmp/u-boot-xlnx-xilinx-v2015.1/include/configs
cp patches/u-boot-lantiq.c tmp/u-boot-xlnx-xilinx-v2015.1/drivers/net/phy/lantiq.c
Pavel
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- Posts: 799
- Joined: Sat May 23, 2015 5:22 pm
Re: Update u-boot loader
For information.
I've just checked that CONFIG_CPU_FREQ_HZ, CONFIG_SYS_FREQ_HZ and CONFIG_ZYNQ_PS_CLK_FREQ are not used anywhere in the u-boot-xlnx code and can be safely removed.
Edit: CONFIG_ZYNQ_PS_CLK_FREQ is used in arch/arm/cpu/armv7/zynq/clk.c
but its default value is 33333333UL and its definition can be safely removed from zynq_redpitaya.h.
I've just checked that CONFIG_CPU_FREQ_HZ, CONFIG_SYS_FREQ_HZ and CONFIG_ZYNQ_PS_CLK_FREQ are not used anywhere in the u-boot-xlnx code and can be safely removed.
Edit: CONFIG_ZYNQ_PS_CLK_FREQ is used in arch/arm/cpu/armv7/zynq/clk.c
but its default value is 33333333UL and its definition can be safely removed from zynq_redpitaya.h.
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- Posts: 10
- Joined: Thu May 21, 2015 5:28 am
Re: Update u-boot loader
Hi Pavel, thaks, will merge those. I am just curious what's the role of lantiq code? I've done quick network testing with just the default xilinx phy drivers and it appears to be running fine (pings/dhcp). My RP instance is v.1.0 hardware.
-Max
-Max
pavel wrote:Hi Max,
I have a couple of additional files that I add to u-boot-xlnx (version xilinx-2015.1): lantiq.c and zynq-red-pitaya.dts. Maybe you can adapt them to your version.
The files can be found at
https://github.com/pavel-demin/red-pita ... er/patches
And I'm using the following commands to apply all the patches:Cheers,Code: Select all
patch -d tmp -p 0 < patches/u-boot-xlnx-xilinx-v2015.1.patch cp patches/zynq_red_pitaya_defconfig tmp/u-boot-xlnx-xilinx-v2015.1/configs cp patches/zynq-red-pitaya.dts tmp/u-boot-xlnx-xilinx-v2015.1/arch/arm/dts cp patches/zynq_red_pitaya.h tmp/u-boot-xlnx-xilinx-v2015.1/include/configs cp patches/u-boot-lantiq.c tmp/u-boot-xlnx-xilinx-v2015.1/drivers/net/phy/lantiq.c
Pavel
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- Posts: 10
- Joined: Thu May 21, 2015 5:28 am
Re: Update u-boot loader
Thanks, I've noticed that too, but did not want to rush removing things yet.
-Max
-Max
pavel wrote:For information.
I've just checked that CONFIG_CPU_FREQ_HZ, CONFIG_SYS_FREQ_HZ and CONFIG_ZYNQ_PS_CLK_FREQ are not used anywhere in the u-boot-xlnx code and can be safely removed.
Edit: CONFIG_ZYNQ_PS_CLK_FREQ is used in arch/arm/cpu/armv7/zynq/clk.c
but its default value is 33333333UL and its definition can be safely removed from zynq_redpitaya.h.
-
- Posts: 799
- Joined: Sat May 23, 2015 5:22 pm
Re: Update u-boot loader
Interesting.sobomax wrote:I am just curious what's the role of lantiq code? I've done quick network testing with just the default xilinx phy drivers and it appears to be running fine (pings/dhcp).
I've copied the lantiq code from the RedPitaya patches.
I thought that the lantiq driver for u-boot was supposed to enable the network functionality in u-boot.
I did a quick test:
- defined CONFIG_SYS_ENET in include/configs/zynq_red_pitaya.h
- rebuilt u-boot
- typed dhcp from the u-boot command prompt
Code: Select all
zynq-uboot> dhcp
Gem.e000b000 Waiting for PHY auto negotiation to complete.... done
BOOTP broadcast 1
...
BOOTP broadcast 17
Retry time exceeded
Code: Select all
zynq-uboot> dhcp
Gem.e000b000 Waiting for PHY auto negotiation to complete.... done
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
DHCP client bound to address 192.168.1.140 (4840 ms)
Code: Select all
zynq-uboot> ping 192.168.1.1
host 192.168.1.1 is alive
Code: Select all
zynq-rp-uboot> dhcp
Gem.e000b000 Waiting for PHY auto negotiation to complete.... done
BOOTP broadcast 1
DHCP client bound to address 192.168.1.140
-
- Posts: 10
- Joined: Thu May 21, 2015 5:28 am
Re: Update u-boot loader
Pavel, also I am curious as to why you've limited memory to 480MB? Yes, there are some devices mapped into 0xe0000000 region, but at least FreeBSD kernel is able to re-map those to the very top of the memory and use the rest just fine. I am pretty sure Linux kernel can do the same.
CPU: Cortex A9-r3 rev 0 (Cortex-A core)
Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext
WB disabled EABT branch prediction enabled
LoUU:2 LoC:2 LoUIS:2
Cache level 1:
32KB/32B 4-way data cache WB Read-Alloc Write-Alloc
32KB/32B 4-way instruction cache Read-Alloc
real memory = 536866816 (511 MB)
avail memory = 518606848 (494 MB)
Physical memory chunk(s):
0x00001000 - 0x1fffffff, 511 MB ( 131071 pages)
Excluded memory regions:
0x01200000 - 0x01753fff, 5 MB ( 1364 pages) NoAlloc
Static device mappings:
0xe0000000 - 0xe02fffff mapped at VA 0xffc00000
0xf8000000 - 0xf8ffffff mapped at VA 0xfec00000
-Max
CPU: Cortex A9-r3 rev 0 (Cortex-A core)
Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext
WB disabled EABT branch prediction enabled
LoUU:2 LoC:2 LoUIS:2
Cache level 1:
32KB/32B 4-way data cache WB Read-Alloc Write-Alloc
32KB/32B 4-way instruction cache Read-Alloc
real memory = 536866816 (511 MB)
avail memory = 518606848 (494 MB)
Physical memory chunk(s):
0x00001000 - 0x1fffffff, 511 MB ( 131071 pages)
Excluded memory regions:
0x01200000 - 0x01753fff, 5 MB ( 1364 pages) NoAlloc
Static device mappings:
0xe0000000 - 0xe02fffff mapped at VA 0xffc00000
0xf8000000 - 0xf8ffffff mapped at VA 0xfec00000
-Max
-
- Posts: 799
- Joined: Sat May 23, 2015 5:22 pm
Re: Update u-boot loader
I need a long continuous block of the DDR3 RAM for simple (without Linux driver and without scatter/gather) DMA. I'm directly writing to this memory block from PL and I'm accessing it from PS using mmap:I am curious as to why you've limited memory to 480MB?
Code: Select all
int fd = open("/dev/mem", O_RDWR);
void *ram = mmap(NULL, 8192*sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0x1E000000);
Here is a link to a longer description of what I'm doing with this memory:
viewtopic.php?f=14&t=551#p2200
So far, it's the simplest solution that I could find.
Edit: This memory region is also useful when running a bare metal application on CPU1:
viewtopic.php?f=14&t=560
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