I am currently working to drive a half bride with the Red Pitaya’s high frequency output. The MOSFET requires at least 1.8V for an active high and so I desolder the bias resistors to get the whole analog output range of 0-2V. Unfortunately, I forgot, that the FPGA produces always -1V as default voltage to achieve 0V (-1V FPGA+1V BIAS) at the analog output, when it is not driven. I tried to find out where default voltage is defined in the FPGA image files, but without any luck.
Does anybody know, how I can change the FPGA default analog output voltage from -1V to -2V? Or any other suggestions how to tackle this problem?
My aim is achieve again 0V when the fast analog output is not driven.
Thanks in advance!
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