Redpitaya Forum

Hi ,

I have build bin file for fpga using impact32 and try to load it as follows :

cat new_fpga.bin > /dev/xdevcfg

But after that led 1 which is for fpga ready didn't started blinking.

Please help me in running the bin file or let me know for to build new boot.bin for the board on windows.

Hi,
Did you build the original RedPitaya verilog code, or have you made a new design ? I am asking this because the blinking led 1 is driven by the fpga, and if your design does not have the blink code, no blinking will occur.

rajat wrote:I have build bin file for fpga using impact32

I have not used the impact tools, so I can't say what might go wrong.

I prepare bin files with the promgen utility, which is part of the Xilinx LabTools. Those are also available for Windows.

Please let me know how to install promgen tool. I have installed Lab tool 14.3 which has impact 32/64 amd the chipscope

Hi have tried to build bit file of existing fpga code for red pitaya using vivado 2013 and then bin file using impact. Then tried to load it using following command cat redpitaya_top.bin > /dev/cdevcfg

If you have LabTools already installed, you should have the promgen utility already. To use it, execute the LabTool settings script (change install location, version number and 32/64 bit as appropriate)
linux: windows: Then you should be able to call promgen like this:

Hi,

Thanks for help. Now I am able to build the bin file and load it.

I am facing new issue after loading.
After loading the image using cat led.bin > /dev/xdevcfg
The desired led it blinking but the command promt of linux is not coming.

Please let me know what else I have to add to the fpga code to get the linux promt

Thanks,
Rajat

Hi Rajat,

rajat wrote:Please let me know what else I have to add to the fpga code to get the linux promt

I'm guessing that you did not configure the on-chip peripherals and thus lost the usb and ethernet controllers when you loaded your new bitstream.

I would suggest the following:
Start from the full Red Pitaya code and delete what you don't need. Keep at least the following files:

• fpga/vivado/red_pitaya.srcs/constrs_1/red_pitaya_top.xdc (settings for ADC clock and DNA module)
• fpga/code/red_pitaya.xdc (IO pin assignments and more hardware settings)
• fpga/code/rtl/red_pitaya_top.v (top level connections between modules)
• fpga/code/rtl/red_pitaya_ps.v (interface with the PS)
• fpga/code/rtl/red_pitaya_analog.v (infrastructure to work with ADC/DAC)
• fpga/code/rtl/red_pitaya_hk.v (DNA module)
• fpga/code/rtl/axi_slave.v (AXI_GP connection to PS)
• fpga/vivado/red_pitaya.srcs/sources_1/* (PS and on-chip peripheral configuration)

Then remove from red_pitaya_top.v all references to modules you don't need and disconnect the led drivers in red_pitaya_hk.v

From there, build in your own design.

I have prepared a "reduced" FPGA project that has all connections to the hardware but no application blocks except housekeeping (see attachment).

This will be the basis for a Red Pitaya FPGA tutorial, but should also be a good starting point for your efforts.

Thanks a lot

Nils Roos wrote:I have prepared a "reduced" FPGA project that has all connections to the hardware but no application blocks except housekeeping (see attachment).

This will be the basis for a Red Pitaya FPGA tutorial, but should also be a good starting point for your efforts.

red_pitaya.zip

Please can you tell me where to find the zip file?

Thanks