Error when trying to use external ADC clock

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Program
Posts: 27
Joined: Thu Apr 14, 2016 3:14 pm

Error when trying to use external ADC clock

Post by Program » Wed May 25, 2016 4:58 pm

Hi everyone, I'm currently trying to use an external clock for the Red Pitaya's ADCs. As explained on the website, I have moved resistors R25,26 to positions R23,24 (across the middle and the right connection pads). I'm feeding in an LVDS signal at 100 MHz, but when I try to run the built-in acquire command, I get the following error message:

Unhandleld fault: external abort on non-linefetch (0x1018) at 0x36d46000
Bus error

Any ideas what might be going wrong?

Nils Roos
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Location: Königswinter

Re: Error when trying to use external ADC clock

Post by Nils Roos » Wed May 25, 2016 5:18 pm

This tends to happen when the ADC clock is not stable enough or too low (which at 100MHz isn't the case).
First, you should make sure that your clock signal meets the ADC's requirements.
Then - if you have the tools - measure the clock signal at the ADC's output (pins 39,40 see pic) and verify that it is present and stable.
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Program
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Joined: Thu Apr 14, 2016 3:14 pm

Re: Error when trying to use external ADC clock

Post by Program » Fri May 27, 2016 9:48 am

Thanks a lot for your reply. I will try measuring the clock signal at the ADC pins, but they look very small, so this might be tricky. Would the RP show the same error message if there was no signal coming at all through the resistors R23 and R24? I could at least exclude a faulty resistor connection this way...

Nils Roos
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Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Error when trying to use external ADC clock

Post by Nils Roos » Fri May 27, 2016 12:38 pm

No clock at all at the ADC ENC inputs would give the same error, I'm afraid.

A bit of background:
Since 0.94, all FPGA logic is clocked by the ADC, including the bus bridge to the cores. So when the ADC clock is missing or too erratic, the CPU requests to the FPGA time out, which results in bus errors.

If you find it too difficult to measure the output clock at the ADC, you could implement some simple logic in the FPGA that forwards the ADC clock to the expansion connectors or drives a little binary counter on the LEDs. That would make it easier to observe the ADC clock signal which the FPGA 'sees'.

Program
Posts: 27
Joined: Thu Apr 14, 2016 3:14 pm

Re: Error when trying to use external ADC clock

Post by Program » Fri May 27, 2016 2:25 pm

I've got no experience with FPGA programming at all (long-term goal is to learn that), so that might even take me longer than experimenting with the pins. What I wondered, though, is why the 22 ohm resistors are needed at all for LVDS. As I understand it, the LVDS driver that generates the signal drives a current which produces the differential voltage across the termination resistor. Any resistance on one transmission line would therefore not affect the voltage across the termination resistor, right? Would it therefore not be possible to just bridge the middle and right-hand pads of R23 and R24? Also, what's the value of the termination resistor inside the LVDS receiver of the RP?
If the resistors turn out to be broken (probably during desoldering), where can I find specifications regarding SMD package size?

Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Error when trying to use external ADC clock

Post by Nils Roos » Fri May 27, 2016 5:59 pm

As far as I know, the package information of the components on the pcb is not specified in any of the available documentation.
I don't have enough experience in physically designing fast logic circuits to answer your other questions.

gbhardy
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Joined: Tue May 12, 2015 6:50 pm
Location: CH-Zuerich

Re: Error when trying to use external ADC clock

Post by gbhardy » Fri May 27, 2016 9:25 pm

Hi,
why not measure the original ones and have a look at
http://www.electroniccircuitsdesign.com ... kages.html
Maybe that will be helpful.

Regards
Hartmut

Program
Posts: 27
Joined: Thu Apr 14, 2016 3:14 pm

Re: Error when trying to use external ADC clock

Post by Program » Mon May 30, 2016 3:32 pm

Just for future reference, I think I found out what the value of the termination resistor used in the RP is. From the HW schematics, it should be R37, which has a resistance of 100 ohm, which, I think, is the standard termination resistance of an LVDS line. The clock signal is AC coupled to the ENC+ and ENC- pins of the ADC, so trying to test for continuity between ADC and clock input pins on the extension connector won't be successful. What should work, however, is testing for continuity between R23, R24 and the capacitors C30, C35, which are next to the ENC+ and ENC- pins of the ADC. If those connections are okay, the ADC should receive the clock signal from the E2 pins.

lene85
Posts: 23
Joined: Tue Sep 08, 2015 3:04 pm

Re: Error when trying to use external ADC clock

Post by lene85 » Mon May 30, 2016 9:54 pm

I remember having similar problems as you when I experimented with external clock inputs.
Since you want to learn FPGA programming, I suggest the following steps to debug your problem:
Download the FPGA folder from RedPitaya, install vivado, and compile the bitfile to see that everything works:
https://github.com/RedPitaya/RedPitaya/

Then go to the file
https://github.com/RedPitaya/RedPitaya/ ... taya_top.v and change line 311 from
BUFG bufg_adc_clk (.O (adc_clk ), .I (pll_adc_clk )); // buffer that converts adc_clk passed through pll into adc_clock for most modules
to
BUFG bufg_adc_clk (.O (adc_clk ), .I (fclk[0] )); // uses instead 125 MHz clock from PS for debugging, see line 125

After compiling that, everything should work except for the fast analog inputs which should give you corrupted data because your clocks are not synchronized any more.
If this works, your RedPitaya works on a clock that is generated by the PS (actually derived from the 33 MHz quartz on the board i think). This is useful because you will have a partially working fpga without the ADC clock input so that you can proceed to debugging, to make sure your redpitaya is not broken and possibly read the values of some registers. In this configuration, communication with the PS should really work.

Next thing i would do is now to forward the wire adc_clk_in to a led. If the led is half-lit, that means the signal is high for half of the time, i.e. something alternating arrives inside the FPGA (your clock signal, hopefully). You should be able to see the light go dark when you disconnect your 100 MHz clock. This step is also useful because it allows you to send a much slower signal in, i.e. a few MHz. If the led works at low frequency but not at 100 MHz you might indeed have an impedance problem. I was able to insert a 10 MHz clock into the extension connector without special impedance matching. That gave me a huge parasite on the analog outputs, but the clock signal was recognized and able to drive a PLL. I bet things are a bit harder at 100 MHz, so changing the frequency might be a good start.

Once that works, too, I would instead forward the wire pll_locked from the same file to a led (or directly connect both wires to different leds). The wire pll_locked indicates if the PLL used to generate the FPGA clock is able to lock onto the clock signal coming in. That way the led will light up once you correctly connected the external clock. If it doesn't, you can maybe again play with the frequency of your external clock signal and see if that helps.

If you need help with implementing the last paragraph in verilog, I (or many other people here i think) can send you the modified file.

Program
Posts: 27
Joined: Thu Apr 14, 2016 3:14 pm

Re: Error when trying to use external ADC clock

Post by Program » Tue May 31, 2016 5:25 pm

Thanks a lot for this detailed reply, I'll have a go at it. An alternative solution for my purposes would be to turn things round and use the on-board crystal oscillator clock of the RP to synchronise the other devices in my setup. Is there any way to route the signal from the built-in RP clock to two pins (preferably without changing the physical circuit) so I can effectively use the RP as my external clock source?

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