Redpitaya Forum

I was looking here (http://wiki.redpitaya.com/index.php?tit ... oper_Guide) at the developers guide to the workflow of the interfaces--FPGA--ADC.

FPGA architecture is new to me so I am not quite sure if I understand how much is available for development. I know typically the FPGAs are programmed in "blocks" and here it is such that at least one block is handling the input/output to the C code and ADC. I am partially confused as it might seem as if the FPGA is being used as the system's processing module and might not be available for other development.

How much is left over on the FPGA for other development and programming? Lets say I wanted to accumulate the incoming values from the digitizer for a set number of acquisitions up to its bit limit, then interface that accumulated value out to another source. Is that operation available?

This is the utilization of the FPGA (PL) resources with a current RedPitaya build (without the power consumption test code)

FF 9%
LUT 17%
Memory LUT 1%
BRAM 47%
DSP48 30%
BUFG 25%
PLL 50%
Routing resources 5%

Of the memory mapped address regions that allow configuration and data transfer between applications and the PL, 6 out of 8 are used by the basic RP blocks (housekeeping, scope, signal generator, daisy chain, analog mixed signals, pid).

So you could accommodate 2 additional functional blocks without changing the processor / PL interface, and you have between 50% and 80% of the relevant FPGA resources at your disposal.

What you intend to do seems certainly doable, though I didn't understand the "then interface that accumulated value out to another source" part.

I checked the Zynq Product Table at: http://www.xilinx.com/publications/prod ... -table.pdf
I couldn't find all the items you specified What I could find, breaks down as:

Item -----Zynq-7010 ----Used ---- % -----Available
FF ------------35,200 ------3,168 ----9% ----32,032
LUT ----------17,600 ------2,992 --17% ----14,608
Memory LUT ------?------------------1%
BRAM --------240KB --112.8KB --47% ---127KB
DSP48 ------------80 ----------24 --30% --------56
BUFG --------------? -----------------25%
PLL -----------------? ----------------50%
Routing
resources ---------? ------------------5%
-------------------------------------------------------------------------------------------
Dashes added to help stuff line up.

If you are asking, what the numbers for the remaining question marks are ... There are no numbers for available routing resources, the statistic is just listed towards the end of the tool output.
BUFG are global clock buffers.