Input Stage Imperfections
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Input Stage Imperfections
Hey guys
when watching square wave inputs on the redpitaya's RF channels, we see some very unwanted phenomena at the edges.
The following pictures are 5kHz and 10kHz 1 Vpp square waves measured with a 50 Ohm terminator (but it looks the same without termination).
Do you have an idea how to get rid of the initial "ringing"?
when watching square wave inputs on the redpitaya's RF channels, we see some very unwanted phenomena at the edges.
The following pictures are 5kHz and 10kHz 1 Vpp square waves measured with a 50 Ohm terminator (but it looks the same without termination).
Do you have an idea how to get rid of the initial "ringing"?
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Re: Input Stage Imperfections
Hi Nils
Thank you for you quick reply. However, although it looks similar I don't think this is the problem we are facing here. This appears with a simple SMA connection from one of the outputs to one of the inputs of the RP (or SMA from an external function generator to the input). We don't use a 10x probe.
Best,
Alex
Thank you for you quick reply. However, although it looks similar I don't think this is the problem we are facing here. This appears with a simple SMA connection from one of the outputs to one of the inputs of the RP (or SMA from an external function generator to the input). We don't use a 10x probe.
Best,
Alex
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Re: Input Stage Imperfections
Hi,
I have noticed that you are working with raw data from ADC. If you have 1 Vpp signal then you should get ADC values from -4092 to 4092.
Your max value is +-2000 which is around 0.5 Vpp
I don’t get this edges even without 50 Ohm termination.
Please check your connections/cables.
Regards
5 KHz 1 Vpp
I have noticed that you are working with raw data from ADC. If you have 1 Vpp signal then you should get ADC values from -4092 to 4092.
Your max value is +-2000 which is around 0.5 Vpp
I don’t get this edges even without 50 Ohm termination.
Please check your connections/cables.
Regards
5 KHz 1 Vpp
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Re: Input Stage Imperfections
This is certainly not a cable issue.
I checked with many different cables. Connecting the same cable to a scope yields a good result.
However, I did some further testing and apparently there is a significant change of gain (7% difference) around 10-100kHz. I attached some measured data of constant 2Vpp Amplitude input at different frequencies. I tested this with three different RedPitayas. Everywhere it's the same.
I checked with many different cables. Connecting the same cable to a scope yields a good result.
However, I did some further testing and apparently there is a significant change of gain (7% difference) around 10-100kHz. I attached some measured data of constant 2Vpp Amplitude input at different frequencies. I tested this with three different RedPitayas. Everywhere it's the same.
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Re: Input Stage Imperfections
Hi,
If you have sine signal 2Vpp then you should get raw values from -8192 to 8192.
Nevertheless in the attached file you will find RF input response measurements
performed with Agilent Signal generator and with Red Pitaya Signal generator.
The measurements with Red Pitaya Signal generator are similar to yours.
This response is not so good as response when Agilent SG is used because of
the coupled effect of the Red Pitayas RF output and RF input characteristics.
But it still in -3dB range.
Regards.
If you have sine signal 2Vpp then you should get raw values from -8192 to 8192.
Nevertheless in the attached file you will find RF input response measurements
performed with Agilent Signal generator and with Red Pitaya Signal generator.
The measurements with Red Pitaya Signal generator are similar to yours.
This response is not so good as response when Agilent SG is used because of
the coupled effect of the Red Pitayas RF output and RF input characteristics.
But it still in -3dB range.
Regards.
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Re: Input Stage Imperfections
@defreng What GUI app are you using here to plot the waveform?
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Re: Input Stage Imperfections
Hi Alex,
A possible explanation for your observations is the analog frontend. Prior to the ADC there is an small conditioning circuit to select the voltage range (+/- 1 V or +/-20 V). The +/- 1 V is the one represented here:
The transfer function (frequency response) of this stage is the follow one, which seems to fit in your observations.
One possible solutions for that issue is to remove the frontend. Simply remove the two jumpers of the selector and use one of them to connect the central pins. Be careful about the new voltage limitation and that ridden voltage will be twice the real one.
I hope this helps you. If so, pleas post the results for the whole community!
Best regards,
Quim
A possible explanation for your observations is the analog frontend. Prior to the ADC there is an small conditioning circuit to select the voltage range (+/- 1 V or +/-20 V). The +/- 1 V is the one represented here:
The transfer function (frequency response) of this stage is the follow one, which seems to fit in your observations.
One possible solutions for that issue is to remove the frontend. Simply remove the two jumpers of the selector and use one of them to connect the central pins. Be careful about the new voltage limitation and that ridden voltage will be twice the real one.
I hope this helps you. If so, pleas post the results for the whole community!
Best regards,
Quim
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Re: Input Stage Imperfections
Hi,
We're faced with a similar problem in our lab. We're feeding the Red Pitaya straight from a pulse generator (50 ohm load), using 50 ohm coax cables and a 50 ohm terminator in parallel before the input. The pulses themselves look perfectly square on a fast scope with the same scale. However, the Red Pitaya input has a rise time of a couple µs, which is slower than we would expect from the 50 MHz bandwidth. Here are some pictures taken for different jumper settings:
Low voltage jumper setting (there are clearly two timescales here, a very fast sub-µs rise time and a slower one)
High voltage jumper setting
No input stage (jumpered center pins together)
Strangely enough, jumpering the input stage seems to be slower than the low voltage setting. Do you think the rise time comes from the "amplifier + filter" that is before the DAC?
Cheers,
Esteban
We're faced with a similar problem in our lab. We're feeding the Red Pitaya straight from a pulse generator (50 ohm load), using 50 ohm coax cables and a 50 ohm terminator in parallel before the input. The pulses themselves look perfectly square on a fast scope with the same scale. However, the Red Pitaya input has a rise time of a couple µs, which is slower than we would expect from the 50 MHz bandwidth. Here are some pictures taken for different jumper settings:
Low voltage jumper setting (there are clearly two timescales here, a very fast sub-µs rise time and a slower one)
High voltage jumper setting
No input stage (jumpered center pins together)
Strangely enough, jumpering the input stage seems to be slower than the low voltage setting. Do you think the rise time comes from the "amplifier + filter" that is before the DAC?
Cheers,
Esteban
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Re: Input Stage Imperfections
My opinion to that issue:
The input stage circuitry may not be adapted to the ADC's input capacity correctly. This also explains why Esteban's different responses depending on HV or LV setting. It is either highpass or lowpass characteristic.
@Quim: For the resulting characteristic it is not sufficient to look at the circuitry alone, you always have to include the ADC's input capacitance.
By the way, my rectangle response is (at least for LV) much more accurate than the shown pictures. But to be honest, for some individual RPs it would be better to have a trim-capacitor in the voltage divider.
- So, it is not the cable, termination does have different impacts.
- It is a mis-dimensioning of the capacitors, not suited to the ADC's input capacity. Secondly it also could be caused by too big tolerances of the capacitors inside the voltage divider.
Dieter
The input stage circuitry may not be adapted to the ADC's input capacity correctly. This also explains why Esteban's different responses depending on HV or LV setting. It is either highpass or lowpass characteristic.
@Quim: For the resulting characteristic it is not sufficient to look at the circuitry alone, you always have to include the ADC's input capacitance.
By the way, my rectangle response is (at least for LV) much more accurate than the shown pictures. But to be honest, for some individual RPs it would be better to have a trim-capacitor in the voltage divider.
- So, it is not the cable, termination does have different impacts.
- It is a mis-dimensioning of the capacitors, not suited to the ADC's input capacity. Secondly it also could be caused by too big tolerances of the capacitors inside the voltage divider.
Dieter
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