Discussions about active development projects
#7674 by queissman
Wed Jul 05, 2017 2:04 pm
I solved the problem for now, by simply using copying the raw data to my host PC using scp within Cygwin, which I call using Labview system execute. The problem I have now is that after two subsequent calls of system execute.vi the RP cuts off the connection and the blue and red LEDs are not illuminated anymore, but only the green one, so I have to restart the RP and reconnect.
#7740 by jmoederl
Mon Jul 17, 2017 12:06 pm

I'm trying to record both chanels with 10MS/s continously into a ringbuffer with 20MS for each chanel(=2 seconds worth of signal). your project seems to do exactly that, with additonal stuff like UDP transmitting.
given that i'm new to the RedPitaya Ecosysetem and FPGA programming i'm lost in the code on github because its just too much at once. i'd be great if you could give me a few hints on where exactly the magic of getting the buffer to the linux userspace happens. do you still use the kernel module to make it look like a file? did you modify the kernel itself to share a specific region of the RAM? and where exactly in the FPGA code can i find that address and experiment with its size? and which parts of the whole RedPitaya ecosystem do i need to rebuild in order to get this working?

thanks in advance
#8168 by MateoConLechuga
Tue Nov 07, 2017 8:26 pm
Impressive work! I am currently working on a project that will need around 5 seconds of continuous sampling, as I would like to do post-processing on the raw ADC data. Is this feasible to do with this project, and is it possible to stream via TCP to an external computer once the data has been captured? Thanks for your reply.

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