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Continuous ADC to DAC

Last post by misiara09 « Wed Sep 11, 2024 7:03 pm
Replies: 3
by misiara09 » Wed Sep 04, 2024 3:34 pm

3 Replies

3053 Views

Last post by misiara09
Wed Sep 11, 2024 7:03 pm
I/O Error On Bitstream loading

Last post by misiara09 « Wed Sep 11, 2024 5:58 pm

by misiara09 » Wed Sep 11, 2024 5:58 pm

0 Replies

146 Views

Last post by misiara09
Wed Sep 11, 2024 5:58 pm
External clock complications

Last post by matankeda « Wed Aug 28, 2024 8:11 am

by matankeda » Wed Aug 28, 2024 8:11 am

0 Replies

3107 Views

Last post by matankeda
Wed Aug 28, 2024 8:11 am
Memory write error at 0x100000. MMU section translation fault

Last post by zeroes « Fri Aug 23, 2024 11:39 am

by zeroes » Fri Aug 23, 2024 11:39 am

0 Replies

2644 Views

Last post by zeroes
Fri Aug 23, 2024 11:39 am
Help programming PL registers from PC

Last post by redpitaya « Wed Aug 21, 2024 11:57 am
Replies: 2
by ubermoo » Mon Aug 12, 2024 11:00 pm

2 Replies

2000 Views

Last post by redpitaya
Wed Aug 21, 2024 11:57 am
Record with low sampling rate. Need support

Last post by redpitaya « Wed Aug 21, 2024 11:55 am
Replies: 1
by dannycantley » Sun Aug 11, 2024 1:03 pm

1 Replies

1576 Views

Last post by redpitaya
Wed Aug 21, 2024 11:55 am
RP functions not working when externally clocked

Last post by 33dnp « Mon Aug 05, 2024 4:27 am
Replies: 2
by matankeda » Tue Jul 30, 2024 5:16 pm

2 Replies

2469 Views

Last post by 33dnp
Mon Aug 05, 2024 4:27 am
AXI functions not working for new Ecosystems

Last post by matankeda « Tue Jul 30, 2024 4:10 pm
Replies: 15
by matankeda » Wed Jul 03, 2024 5:59 pm
1

2
15 Replies

5039 Views

Last post by matankeda
Tue Jul 30, 2024 4:10 pm
Multi-FPGA Synchronization on 250-12 for Phase Control

Last post by juretrn « Thu Jun 27, 2024 10:02 am
Replies: 1
by taylor_levaur » Thu Jun 20, 2024 4:36 pm

1 Replies

5254 Views

Last post by juretrn
Thu Jun 27, 2024 10:02 am
Extracting or reconstructing fsbl.elf

Last post by 33dnp « Tue Jun 11, 2024 9:32 am
Replies: 1
by gnuoyd » Wed May 15, 2024 3:29 am

1 Replies

5175 Views

Last post by 33dnp
Tue Jun 11, 2024 9:32 am
Error on app tutorial?

Last post by javiruni10 « Tue May 14, 2024 12:29 pm
Replies: 3
by javiruni10 » Mon May 13, 2024 5:54 pm

3 Replies

3821 Views

Last post by javiruni10
Tue May 14, 2024 12:29 pm
How to access clk_sel on the 4ch RP in C to select an external CLK

Last post by redpitaya « Mon May 13, 2024 3:23 pm
Replies: 20
by arparker » Wed Jun 14, 2023 3:28 pm
1

2

3
20 Replies

13794 Views

Last post by redpitaya
Mon May 13, 2024 3:23 pm
Controlling new FPGA program from PyRPL

Last post by redpitaya « Mon May 13, 2024 3:21 pm
Replies: 1
by fpgaSim123 » Fri May 03, 2024 4:52 pm

1 Replies

3557 Views

Last post by redpitaya
Mon May 13, 2024 3:21 pm
"Connection refused" from the client

Last post by juretrn « Thu May 09, 2024 11:52 am
Replies: 1
by blacksea680 » Wed May 08, 2024 2:33 am

1 Replies

3582 Views

Last post by juretrn
Thu May 09, 2024 11:52 am
Where to find Red Pitaya's FPGA memory map exact pin addresses?

Last post by redpitaya « Tue May 07, 2024 9:00 am
Replies: 7
by WindJammer » Thu Apr 04, 2024 7:05 pm

7 Replies

5377 Views

Last post by redpitaya
Tue May 07, 2024 9:00 am
Binary Transfer with DMA on 125-14

Last post by [email protected] « Thu May 02, 2024 6:38 pm
Replies: 2
by [email protected] » Tue Apr 30, 2024 6:52 pm

2 Replies

3573 Views

Last post by [email protected]
Thu May 02, 2024 6:38 pm
Version 2 on hw_rev 1.1.2 Fail

Last post by redpitaya « Tue Apr 30, 2024 9:16 am
Replies: 3
by gmallard » Tue Apr 23, 2024 11:59 pm

3 Replies

4197 Views

Last post by redpitaya
Tue Apr 30, 2024 9:16 am
DMA Acquisition breaks on 2nd attempt, every time.

Last post by redpitaya « Tue Apr 30, 2024 8:54 am
Replies: 3
by [email protected] » Wed Apr 24, 2024 7:28 pm

3 Replies

4464 Views

Last post by redpitaya
Tue Apr 30, 2024 8:54 am
122-16 artifacts

Last post by redpitaya « Fri Apr 26, 2024 1:59 pm
Replies: 2
by k9gasman » Tue Apr 23, 2024 10:31 pm

2 Replies

3946 Views

Last post by redpitaya
Fri Apr 26, 2024 1:59 pm
Dividing signals and input to PID

Last post by fpgaSim123 « Thu May 02, 2024 4:27 pm
Replies: 4
by fpgaSim123 » Wed Apr 24, 2024 12:45 pm

4 Replies

8353 Views

Last post by fpgaSim123
Thu May 02, 2024 4:27 pm
Python RedPitaya STEMlab125-14 problem

Last post by redpitaya « Mon Apr 15, 2024 1:53 pm
Replies: 2
by oligofrenia » Fri Apr 12, 2024 12:24 pm

2 Replies

4036 Views

Last post by redpitaya
Mon Apr 15, 2024 1:53 pm
Edit 4ch AXI functions.

Last post by 33dnp « Fri Apr 12, 2024 3:23 pm
Replies: 4
by matankeda » Tue Nov 28, 2023 10:49 pm

4 Replies

32546 Views

Last post by 33dnp
Fri Apr 12, 2024 3:23 pm
122-16 diversity

Last post by k9gasman « Thu Apr 11, 2024 10:20 pm
Replies: 4
by k9gasman » Thu Apr 11, 2024 12:57 am

4 Replies

4397 Views

Last post by k9gasman
Thu Apr 11, 2024 10:20 pm
Register interaction in v0.94

Last post by sslerose « Tue Apr 30, 2024 5:14 pm
Replies: 5
by sslerose » Wed Mar 27, 2024 3:39 am

5 Replies

11484 Views

Last post by sslerose
Tue Apr 30, 2024 5:14 pm
Bootable SD with Pavel Denim's

Last post by pavel « Thu Mar 21, 2024 1:45 pm
Replies: 1
by bdillmann » Thu Mar 21, 2024 12:59 pm

1 Replies

4729 Views

Last post by pavel
Thu Mar 21, 2024 1:45 pm

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