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Web application with own FPGA funcionalities

Last post by TheGeri « Mon Oct 14, 2024 7:43 am
Replies: 1
by TheGeri » Fri Oct 11, 2024 7:02 pm

1 Replies

203 Views

Last post by TheGeri
Mon Oct 14, 2024 7:43 am
Help programming PL registers from PC

Last post by paracpg « Fri Oct 11, 2024 9:05 am
Replies: 3
by ubermoo » Mon Aug 12, 2024 11:00 pm

3 Replies

2996 Views

Last post by paracpg
Fri Oct 11, 2024 9:05 am
pyrpl spectrum analyser

Last post by paracpg « Thu Oct 10, 2024 8:28 pm
Replies: 5
by paracpg » Fri Sep 20, 2024 4:49 pm

5 Replies

1990 Views

Last post by paracpg
Thu Oct 10, 2024 8:28 pm
SCPI burst averaging

Last post by redpitaya « Thu Oct 10, 2024 9:48 am
Replies: 1
by tdde » Tue Oct 08, 2024 3:06 pm

1 Replies

366 Views

Last post by redpitaya
Thu Oct 10, 2024 9:48 am
pyrpl does not support python3

Last post by redpitaya « Mon Oct 07, 2024 12:27 pm
Replies: 4
by paracpg » Fri Oct 04, 2024 6:30 pm

4 Replies

688 Views

Last post by redpitaya
Mon Oct 07, 2024 12:27 pm
Error web browser using 2.04-35 OS version

Last post by redpitaya « Mon Oct 07, 2024 9:02 am
Replies: 1
by TheGeri » Wed Sep 18, 2024 2:49 pm

1 Replies

738 Views

Last post by redpitaya
Mon Oct 07, 2024 9:02 am
I/O Error on LED Blink Project

Last post by redpitaya « Fri Oct 04, 2024 2:16 pm
Replies: 1
by misiara09 » Wed Sep 18, 2024 6:43 pm

1 Replies

1136 Views

Last post by redpitaya
Fri Oct 04, 2024 2:16 pm
python rspa client application

Last post by hamza.oncuer « Wed Oct 02, 2024 7:52 am
Replies: 16
by hamza.oncuer » Wed Sep 25, 2024 9:56 am
1

2
16 Replies

1038 Views

Last post by hamza.oncuer
Wed Oct 02, 2024 7:52 am
External clock complications

Last post by redpitaya « Tue Oct 01, 2024 12:53 pm
Replies: 1
by matankeda » Wed Aug 28, 2024 8:11 am

1 Replies

4103 Views

Last post by redpitaya
Tue Oct 01, 2024 12:53 pm
Writing a stream client app

Last post by 33dnp « Thu Sep 26, 2024 3:12 pm
Replies: 5
by massimom44 » Wed Nov 08, 2023 4:23 am

5 Replies

14296 Views

Last post by 33dnp
Thu Sep 26, 2024 3:12 pm
Continuous ADC to DAC

Last post by misiara09 « Wed Sep 11, 2024 7:03 pm
Replies: 3
by misiara09 » Wed Sep 04, 2024 3:34 pm

3 Replies

5559 Views

Last post by misiara09
Wed Sep 11, 2024 7:03 pm
I/O Error On Bitstream loading

Last post by misiara09 « Wed Sep 11, 2024 5:58 pm

by misiara09 » Wed Sep 11, 2024 5:58 pm

0 Replies

1045 Views

Last post by misiara09
Wed Sep 11, 2024 5:58 pm
Memory write error at 0x100000. MMU section translation fault

Last post by zeroes « Fri Aug 23, 2024 11:39 am

by zeroes » Fri Aug 23, 2024 11:39 am

0 Replies

4456 Views

Last post by zeroes
Fri Aug 23, 2024 11:39 am
Record with low sampling rate. Need support

Last post by redpitaya « Wed Aug 21, 2024 11:55 am
Replies: 1
by dannycantley » Sun Aug 11, 2024 1:03 pm

1 Replies

2484 Views

Last post by redpitaya
Wed Aug 21, 2024 11:55 am
RP functions not working when externally clocked

Last post by 33dnp « Mon Aug 05, 2024 4:27 am
Replies: 2
by matankeda » Tue Jul 30, 2024 5:16 pm

2 Replies

3404 Views

Last post by 33dnp
Mon Aug 05, 2024 4:27 am
AXI functions not working for new Ecosystems

Last post by matankeda « Tue Jul 30, 2024 4:10 pm
Replies: 15
by matankeda » Wed Jul 03, 2024 5:59 pm
1

2
15 Replies

6523 Views

Last post by matankeda
Tue Jul 30, 2024 4:10 pm
Multi-FPGA Synchronization on 250-12 for Phase Control

Last post by juretrn « Thu Jun 27, 2024 10:02 am
Replies: 1
by taylor_levaur » Thu Jun 20, 2024 4:36 pm

1 Replies

7053 Views

Last post by juretrn
Thu Jun 27, 2024 10:02 am
Extracting or reconstructing fsbl.elf

Last post by 33dnp « Tue Jun 11, 2024 9:32 am
Replies: 1
by gnuoyd » Wed May 15, 2024 3:29 am

1 Replies

6131 Views

Last post by 33dnp
Tue Jun 11, 2024 9:32 am
Error on app tutorial?

Last post by javiruni10 « Tue May 14, 2024 12:29 pm
Replies: 3
by javiruni10 » Mon May 13, 2024 5:54 pm

3 Replies

4742 Views

Last post by javiruni10
Tue May 14, 2024 12:29 pm
How to access clk_sel on the 4ch RP in C to select an external CLK

Last post by redpitaya « Mon May 13, 2024 3:23 pm
Replies: 20
by arparker » Wed Jun 14, 2023 3:28 pm
1

2

3
20 Replies

15697 Views

Last post by redpitaya
Mon May 13, 2024 3:23 pm
Controlling new FPGA program from PyRPL

Last post by redpitaya « Mon May 13, 2024 3:21 pm
Replies: 1
by fpgaSim123 » Fri May 03, 2024 4:52 pm

1 Replies

4513 Views

Last post by redpitaya
Mon May 13, 2024 3:21 pm
"Connection refused" from the client

Last post by juretrn « Thu May 09, 2024 11:52 am
Replies: 1
by blacksea680 » Wed May 08, 2024 2:33 am

1 Replies

4508 Views

Last post by juretrn
Thu May 09, 2024 11:52 am
Where to find Red Pitaya's FPGA memory map exact pin addresses?

Last post by redpitaya « Tue May 07, 2024 9:00 am
Replies: 7
by WindJammer » Thu Apr 04, 2024 7:05 pm

7 Replies

6436 Views

Last post by redpitaya
Tue May 07, 2024 9:00 am
Binary Transfer with DMA on 125-14

Last post by [email protected] « Thu May 02, 2024 6:38 pm
Replies: 2
by [email protected] » Tue Apr 30, 2024 6:52 pm

2 Replies

4540 Views

Last post by [email protected]
Thu May 02, 2024 6:38 pm
Version 2 on hw_rev 1.1.2 Fail

Last post by redpitaya « Tue Apr 30, 2024 9:16 am
Replies: 3
by gmallard » Tue Apr 23, 2024 11:59 pm

3 Replies

5142 Views

Last post by redpitaya
Tue Apr 30, 2024 9:16 am

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