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Creating a Linux bootable image for Red Pitaya

Last post by redpitaya « Wed Feb 14, 2018 12:29 pm
Replies: 1
by carlos.e.teixeira » Fri Feb 09, 2018 1:44 pm

1 Replies

1009 Views

Last post by redpitaya
Wed Feb 14, 2018 12:29 pm
Simple complex-analog-IO function

Last post by tech62 « Sat Feb 03, 2018 7:38 am
Replies: 7
by tech62 » Fri Jan 19, 2018 11:49 am

7 Replies

1754 Views

Last post by tech62
Sat Feb 03, 2018 7:38 am
Remote access issue

Last post by amike88 « Fri Feb 02, 2018 7:01 pm
Replies: 3
by carlos.e.teixeira » Wed Jan 03, 2018 12:58 pm

3 Replies

1084 Views

Last post by amike88
Fri Feb 02, 2018 7:01 pm
Generating Signals - Noisy Second Channel

Last post by Bruno Gama « Fri Feb 02, 2018 4:25 pm

by Bruno Gama » Fri Feb 02, 2018 4:25 pm

0 Replies

641 Views

Last post by Bruno Gama
Fri Feb 02, 2018 4:25 pm
use as a hardware?

Last post by mohammadrasekh68 « Mon Jan 29, 2018 1:52 pm
Replies: 2
by liuwei » Mon Jun 01, 2015 9:53 am

2 Replies

2672 Views

Last post by mohammadrasekh68
Mon Jan 29, 2018 1:52 pm
Export Data whith Logic Analyser don't work

Last post by Paco « Wed Jan 24, 2018 10:45 pm

by Paco » Wed Jan 24, 2018 10:45 pm

0 Replies

573 Views

Last post by Paco
Wed Jan 24, 2018 10:45 pm
Including the tft-E2.dtsi file

Last post by carlos.e.teixeira « Wed Jan 24, 2018 6:33 pm

by carlos.e.teixeira » Wed Jan 24, 2018 6:33 pm

0 Replies

539 Views

Last post by carlos.e.teixeira
Wed Jan 24, 2018 6:33 pm
HV/LV jumper setting

Last post by redpitaya « Wed Jan 24, 2018 12:59 pm
Replies: 3
by igttgit » Mon May 30, 2016 3:18 pm

3 Replies

3411 Views

Last post by redpitaya
Wed Jan 24, 2018 12:59 pm
red pitaya sink in GRC

Last post by tech62 « Fri Jan 19, 2018 6:43 am
Replies: 2
by tech62 » Thu Oct 19, 2017 9:51 am

2 Replies

1397 Views

Last post by tech62
Fri Jan 19, 2018 6:43 am
라이브카지노주소 =+=com824.com=+= 전화배팅바카라 사이트바카라

Last post by g5n4vmhej « Sat Jan 13, 2018 1:32 am

by g5n4vmhej » Sat Jan 13, 2018 1:32 am

0 Replies

477 Views

Last post by g5n4vmhej
Sat Jan 13, 2018 1:32 am
라이브바카라 +=com824.com=+ 카지노사이트 실시간카지노

Last post by g5n4vmhej « Sat Jan 13, 2018 1:31 am

by g5n4vmhej » Sat Jan 13, 2018 1:31 am

0 Replies

330 Views

Last post by g5n4vmhej
Sat Jan 13, 2018 1:31 am
라이브카지노 +=com824.com=+ 전화배팅카지노 카지노추천

Last post by g5n4vmhej « Sat Jan 13, 2018 1:31 am

by g5n4vmhej » Sat Jan 13, 2018 1:31 am

0 Replies

395 Views

Last post by g5n4vmhej
Sat Jan 13, 2018 1:31 am
scpi commands via c# application

Last post by Ilkka « Fri Jan 05, 2018 9:49 pm
Replies: 5
by aschuetz » Fri Sep 15, 2017 2:26 pm

5 Replies

2742 Views

Last post by Ilkka
Fri Jan 05, 2018 9:49 pm
How to load automatically bit file into RP while rebooting

Last post by tomershahar11 « Wed Dec 20, 2017 12:07 pm

by tomershahar11 » Wed Dec 20, 2017 12:07 pm

0 Replies

485 Views

Last post by tomershahar11
Wed Dec 20, 2017 12:07 pm
scpi-server overflow

Last post by aschuetz « Wed Dec 20, 2017 10:04 am
Replies: 2
by aschuetz » Fri Nov 04, 2016 10:34 am

2 Replies

2175 Views

Last post by aschuetz
Wed Dec 20, 2017 10:04 am
How to allocate memory for/from FPGA (side)

Last post by itcat42 « Tue Dec 19, 2017 5:01 pm
Replies: 2
by itcat42 » Thu Dec 14, 2017 2:06 pm

2 Replies

871 Views

Last post by itcat42
Tue Dec 19, 2017 5:01 pm
Taking two fast ADC inputs at the same time.

Last post by vaishnavi.suri « Tue Dec 19, 2017 11:37 am

by vaishnavi.suri » Tue Dec 19, 2017 11:37 am

0 Replies

549 Views

Last post by vaishnavi.suri
Tue Dec 19, 2017 11:37 am
Suggestions / ideas on how to accomplish my project?

Last post by pavel « Fri Dec 01, 2017 8:38 am
Replies: 12
by mnordgard » Mon Nov 27, 2017 2:48 pm
1

2
12 Replies

2924 Views

Last post by pavel
Fri Dec 01, 2017 8:38 am
Need example code of PID and FIR filter using verilog

Last post by amin « Mon Nov 27, 2017 11:25 am
Replies: 3
by amin » Sat Nov 25, 2017 6:05 am

3 Replies

1773 Views

Last post by amin
Mon Nov 27, 2017 11:25 am
My first FPGA design

Last post by amin « Mon Nov 27, 2017 7:28 am
Replies: 6
by tsitsimp » Thu Dec 15, 2016 2:11 pm

6 Replies

5528 Views

Last post by amin
Mon Nov 27, 2017 7:28 am
scpi-server issues

Last post by simone.mannori « Sun Nov 26, 2017 8:39 am

by simone.mannori » Sun Nov 26, 2017 8:39 am

0 Replies

841 Views

Last post by simone.mannori
Sun Nov 26, 2017 8:39 am
FPGA Filter programming with Verilog

Last post by amin « Sat Nov 25, 2017 4:09 am
Replies: 9
by TheWickedOne » Mon Aug 31, 2015 11:11 am

9 Replies

10574 Views

Last post by amin
Sat Nov 25, 2017 4:09 am
Generating a burst infinite times

Last post by shonen3000 « Fri Nov 24, 2017 5:52 pm

by shonen3000 » Fri Nov 24, 2017 5:52 pm

0 Replies

811 Views

Last post by shonen3000
Fri Nov 24, 2017 5:52 pm
Signal generation via HDL Coder

Last post by amin « Thu Nov 23, 2017 3:08 pm
Replies: 12
by rothmart » Wed Oct 19, 2016 2:33 pm
1

2
12 Replies

7880 Views

Last post by amin
Thu Nov 23, 2017 3:08 pm
What's the reason behind LCR meter frequencies limitations ?

Last post by vladkrem « Thu Nov 16, 2017 10:45 pm

by vladkrem » Thu Nov 16, 2017 10:45 pm

0 Replies

867 Views

Last post by vladkrem
Thu Nov 16, 2017 10:45 pm

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