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1-wire communication with the Red Pitaya

Last post by alexthegalax « Mon Jan 15, 2018 7:39 pm

by alexthegalax » Mon Jan 15, 2018 7:39 pm

0 Replies

656 Views

Last post by alexthegalax
Mon Jan 15, 2018 7:39 pm
My User Account is invalid for some reason

Last post by redpitaya « Thu Jan 04, 2018 7:42 pm
Replies: 1
by Drulli » Sat Dec 23, 2017 1:18 pm

1 Replies

751 Views

Last post by redpitaya
Thu Jan 04, 2018 7:42 pm
application marketplace

Last post by pracha « Tue Dec 26, 2017 12:41 pm
Replies: 3
by DL2BBF » Thu Dec 21, 2017 11:04 am

3 Replies

1190 Views

Last post by pracha
Tue Dec 26, 2017 12:41 pm
Units for PID controller

Last post by sesquipedalian « Mon Dec 18, 2017 11:12 pm

by sesquipedalian » Mon Dec 18, 2017 11:12 pm

0 Replies

637 Views

Last post by sesquipedalian
Mon Dec 18, 2017 11:12 pm
Red Pitaya for CAN based instrument

Last post by OMatthias « Thu Dec 14, 2017 1:19 pm
Replies: 2
by Karikalan » Thu Nov 02, 2017 1:27 pm

2 Replies

1380 Views

Last post by OMatthias
Thu Dec 14, 2017 1:19 pm
Wi-Fi configuration with Alpine Linux

Last post by amin « Sat Dec 02, 2017 6:02 am
Replies: 16
by pavel » Wed Nov 29, 2017 3:14 pm
1

2
16 Replies

3506 Views

Last post by amin
Sat Dec 02, 2017 6:02 am
Controlling the DAC output

Last post by amin « Sat Nov 25, 2017 5:48 am
Replies: 6
by blevlab » Fri Sep 30, 2016 3:05 am

6 Replies

5353 Views

Last post by amin
Sat Nov 25, 2017 5:48 am
Writing AXI stream data to DRAM

Last post by JB « Thu Nov 23, 2017 5:46 pm
Replies: 1
by parveen » Sat Nov 18, 2017 9:09 am

1 Replies

1447 Views

Last post by JB
Thu Nov 23, 2017 5:46 pm
Will redpitaya be suitable?

Last post by JB « Fri Nov 17, 2017 10:12 am
Replies: 2
by MateoConLechuga » Tue Nov 07, 2017 6:22 pm

2 Replies

1523 Views

Last post by JB
Fri Nov 17, 2017 10:12 am
Cant Connect over Direct lan ?

Last post by Losspost « Sun Nov 12, 2017 11:23 pm

by Losspost » Sun Nov 12, 2017 11:23 pm

0 Replies

959 Views

Last post by Losspost
Sun Nov 12, 2017 11:23 pm
Will redpitaya do my job?

Last post by JohnnyMalaria « Sun Nov 05, 2017 12:14 am
Replies: 1
by Mr_Duck » Thu Nov 02, 2017 11:27 am

1 Replies

1100 Views

Last post by JohnnyMalaria
Sun Nov 05, 2017 12:14 am
Will redpitaya do my job?

Last post by Mr_Duck « Thu Nov 02, 2017 11:27 am

by Mr_Duck » Thu Nov 02, 2017 11:27 am

0 Replies

609 Views

Last post by Mr_Duck
Thu Nov 02, 2017 11:27 am
ADC data to DDR ring buffer speed

Last post by JB « Tue Oct 31, 2017 10:05 am
Replies: 1
by JohnDobbins » Thu Aug 17, 2017 2:42 pm

1 Replies

1826 Views

Last post by JB
Tue Oct 31, 2017 10:05 am
SCPI & LabView Problems with the Generator function

Last post by amike88 « Mon Oct 23, 2017 12:09 pm
Replies: 1
by Sahitaz » Thu Oct 19, 2017 10:12 am

1 Replies

1392 Views

Last post by amike88
Mon Oct 23, 2017 12:09 pm
Problems with fully bandwidth on DAC and ADC

Last post by gmb « Thu Oct 19, 2017 9:50 pm
Replies: 2
by EMsoft » Wed Oct 11, 2017 12:57 pm

2 Replies

1670 Views

Last post by gmb
Thu Oct 19, 2017 9:50 pm
how to acquire signal when external trigger come in labview

Last post by yadavnitin365@gmail.com « Wed Oct 04, 2017 7:27 am

by yadavnitin365@gmail.com » Wed Oct 04, 2017 7:27 am

0 Replies

1044 Views

Last post by yadavnitin365@gmail.com
Wed Oct 04, 2017 7:27 am
LCR Meter

Last post by wira « Tue Oct 03, 2017 8:01 am
Replies: 3
by Steinbeis_EST » Tue Jul 18, 2017 2:41 pm

3 Replies

3191 Views

Last post by wira
Tue Oct 03, 2017 8:01 am
FORUM & MARKETPLACE maintenance

Last post by ON7YI « Thu Sep 21, 2017 8:31 am
Replies: 6
by redpitaya » Mon Aug 07, 2017 2:27 pm

6 Replies

5165 Views

Last post by ON7YI
Thu Sep 21, 2017 8:31 am
SPI Interfacing from Pins to FPGA PLL Modules

Last post by pstockton « Wed Sep 20, 2017 10:04 pm
Replies: 2
by patrick_stockton » Thu Sep 14, 2017 11:56 pm

2 Replies

1485 Views

Last post by pstockton
Wed Sep 20, 2017 10:04 pm
High Level Synthesis, low level I/O, and the RP

Last post by lhochstetter « Mon Sep 18, 2017 4:07 pm
Replies: 2
by lhochstetter » Sun May 21, 2017 2:09 pm

2 Replies

2719 Views

Last post by lhochstetter
Mon Sep 18, 2017 4:07 pm
Signals from an external signal generator to Red Pitaya

Last post by vaishsuri « Mon Sep 04, 2017 12:02 pm

by vaishsuri » Mon Sep 04, 2017 12:02 pm

0 Replies

1086 Views

Last post by vaishsuri
Mon Sep 04, 2017 12:02 pm
Problems

Last post by redpitaya « Thu Aug 31, 2017 10:23 am
Replies: 1
by avlredpitaya » Wed Aug 23, 2017 7:22 am

1 Replies

1860 Views

Last post by redpitaya
Thu Aug 31, 2017 10:23 am
RedPitaya-master project FPGA for VIVADO design recompiling?

Last post by amike88 « Mon Aug 28, 2017 9:11 am
Replies: 1
by downunderthunder123 » Tue Aug 08, 2017 3:45 pm

1 Replies

2455 Views

Last post by amike88
Mon Aug 28, 2017 9:11 am
C Compiling Problems

Last post by jromano « Wed Aug 23, 2017 6:30 pm

by jromano » Wed Aug 23, 2017 6:30 pm

0 Replies

1199 Views

Last post by jromano
Wed Aug 23, 2017 6:30 pm
Pulse generation problems

Last post by JohnnyMalaria « Tue Aug 22, 2017 2:57 am
Replies: 2
by Jackk » Wed Aug 16, 2017 4:19 pm

2 Replies

1795 Views

Last post by JohnnyMalaria
Tue Aug 22, 2017 2:57 am

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