FPGA lesson 4 "Frequency counter"

[Illia]

Hello everyone.

I am learning to use RedPitaya STEMlab 125-14 board and Vivado environment for my internship and I started with examples posted on RedPitaya knowledge base website.
I had no problems with making and understanding the first three lessons, however working on 4th lesson I have encountered a problem that I can't resolve. The problem concerns the part of executing Python program in Jupiter Notebook - when executing the code I get an error about division by zero, which I suppose comes from this line:

Code: Select all

print("Counts: ", count, " cycles: ",Ncycles, " frequency: ",freq/(count/Ncycles),"Hz\n")

Because the "count" starts from 0 and then there is a division freq/count=freq/0.
And I can't figure out how to resolve this issue.
FYI, I verified that RP does send the signal from OUT1 when using native Signal Generator app and I could observe the sinusoid created by RP with oscilloscope.
So, my guess is that the problem is with the Python code. I will be grateful if someone can help me with this issue.

Thank you in advance.

[redpitaya]

Hello Illia,

Sorry for the late reply.

The easiest fix would be to skip the print sentence if the count is 0.

[Illia]

Hello redpitaya,

Thank you for your reply, good point, haha

The thing is that when I uploaded the bitstream of the complete project for this lesson, it worked fine, with no errors.
However, when I have built this project myself, following step-by-step instructions, only then I encountered this problem.
So, probably there is more to this issue than just print line.

But nevermind, I've got the general idea of this lesson and moved on to another projects, more essential to learn for what I intend to do with Red Pitaya.

[redpitaya]

Thank you for the feedback. We will check the example and fix the issues.