Device Tree Source Generation Error

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opp
Posts: 3
Joined: Tue Oct 19, 2021 2:02 am

Device Tree Source Generation Error

Post by opp » Tue Oct 19, 2021 2:11 am

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ERROR: [Hsi 55-1545] Problem running tcl command ::sw_device_tree::generate : invalid command name "gen_clk_property"

FPGA: Zynq SoC

Board: Red Pitaya

Device tree git (also the repo path set in xsct/hsi): https://github.com/Xilinx/device-tree-xlnx/

Check out branch: xilinx-v2017.1
Hardware Tool: Vivado 2020.1 (Force generated .hwdef and .sysdef files along with .bit)
Hardware design: LED blinking example from red pitaya git repo (with some basic AXI GPIO additions)

FSBL and DTC Tool: in SDK 2019.1 (xsct CLI)
FSBL generation works successfully.

Then I can't get the device tree source files to generate correctly at all.

Problem: While using the xsct method (basically following the steps in 'red_pitaya_hsi_fsbl.tcl') for building the device tree I run into error reproduced at the top

My steps are as follows:

Code: Select all

$ hsi open_hw_design <path-to-sysdef-file>
$ hsi set_repo_path <path-to-xilinx-device-tree-repo>
$ create_sw_design device-tree -os device_tree -proc ps7_cortexa9_0
$ set_property CONFIG.kernel_version {2017.2} [get_os]
$ generate_target -dir <path-for-dts-files>
Full error message

Code: Select all

    WARNING: [Hsi 55-1988] DTS file tree already exists dummy.dtsi
    invalid command name "gen_clk_property"
    ERROR: [Hsi 55-1545] Problem running tcl command ::sw_device_tree::generate : invalid command name "gen_clk_property"
    	while executing
    "gen_clk_property $drv_handle"
    	("foreach" body line 8)
    	invoked from within
    "foreach drv_handle [get_drivers] {
    		# generate the default properties
    		gen_peripheral_nodes $drv_handle "create_node_only"
    		gen_r..."
    	(procedure "::sw_device_tree::generate" line 3)
    	invoked from within
    "::sw_device_tree::generate device_tree"
    ERROR: [Hsi 55-1442] Error(s) while running TCL procedure generate()
have tried checking out later branches of the device tree from 2017.1 all through the 2021 branches. The only thing that changes is the specific command that fails.

Sometimes its this 'gen_clock_property'. For newer branches it is some 'get_rp_rm..etc' command.
The 'gen_clk_property' procedure seems to be defined in 'common.tcl', and called in 'device_tree.tcl'.
I can't for the life of me see any syntactical problem with this.

Funny thing is I successfully implemented this workflow with a Vivado 2017.1 generated versions of the same hardware files (hwdef and sysdef) last night and using SDK 2019.1 XSCT. I can't even recreate that workflow now.

Any help with debugging this will be much appreciated.

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