Simple complex-analog-IO function

Applications, development tools, FPGA, C, WEB
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tech62
Posts: 29
Joined: Wed Mar 29, 2017 12:31 pm

Simple complex-analog-IO function

Post by tech62 » Fri Jan 19, 2018 11:49 am

Hello all,
I am wanting to use the RP as a "simple" complex analog IO board, which is controlled via GRC.

In effect I wish to take the SDR Transceiver which has its baseband message in /out from GRC, but to reduce the FPGA functionality to simply pass the GRC baseband dual channel(complex) data without up/down converting to the carrier or any filtering.

This is because I wish to do those tasks in external hardware.

I am aiming for only around 100kSps for the dual ADC & DACs...which should be easy for eth Ethernet comms and GRC processing rate.

Could someone please suggest whether there is existing code I can easily modify (ie: reduce) to achieve this ?

Or perhaps its easier to write the FPGA part from scratch ?
Any and all suggestions appreciated.
Below is a rough diagram of what Im after:
RP-IOconfig.PNG
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pavel
Posts: 516
Joined: Sat May 23, 2015 5:22 pm

Re: Simple complex-analog-IO function

Post by pavel » Fri Jan 19, 2018 2:08 pm

I am aiming for only around 100kSps
For this, you'll still need the up- and down- converters (CIC and FIR filters) to convert to and from the DAC and ADC sample rates (125 MSPS). So, the only parts that should be removed are the DDS and complex multipliers blocks.
I wish to take the SDR Transceiver which has its baseband message in /out from GRC
It can be easily done without modifying any code. Just set the center frequencies to 0 in the sink and source blocks.
Simple complex-analog-IO function
If you want to transmit and receive complex analog signals, then you should use the wideband SDR transceiver. You'll find more details about the complex analog signal at this link.

tech62
Posts: 29
Joined: Wed Mar 29, 2017 12:31 pm

Re: Simple complex-analog-IO function

Post by tech62 » Mon Jan 22, 2018 9:06 am

Dear Pavel, Thank you for your reply. This is exactly what I am after. Setting the carrier to 0 Hz and maintaining the CIC/FIR makes sense.
I have made some progress but not complete success unlike Tcub (the link you suggested I follow).

Below is what I have implemented in case you can make some suggestions in terms of debugging my issue.

My RP has inserted an SD card with the files from red-pitaya-alpine-3.6-armhf-20171130.zip

I have GRC running on Linux Mint (booting into Mint on a Windows laptop at startup) and I am able to open the RP homepage at 192.168.1.100 and run the Wideband SDR Transceiver..though I am not 100% sure it is actually running. Do any LEDS indicate running ?
Screenshot from 2018-01-22 18_19_03.png
When I run the trx_wide_template.grc program I appear to have it running correctly...the RP-wide sink/sources are detected and it looks as below (+some minor mods):
Screenshot from 2018-01-22 18_33_36small.JPG
However I do not have any signal out from the DACs..as confirmed by external scope.

Could you suggest how I could go about isolating where the problem is ?

Thanks again for any further assistance. I have very experience with Linux yet.
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tech62
Posts: 29
Joined: Wed Mar 29, 2017 12:31 pm

Re: Simple complex-analog-IO function

Post by tech62 » Tue Jan 23, 2018 6:03 am

Some further information about my situation.

I confirmed that GRC is receiving data from the RP as when I input a sinewave into the RP ADC, the exact frequency is displayed in GRC.

So one way comms is indeed working....which is great news.

I just need to figure out why the DAC output is not operating.

Any hints on how to debug this would be much appreciated.
Regards.

pavel
Posts: 516
Joined: Sat May 23, 2015 5:22 pm

Re: Simple complex-analog-IO function

Post by pavel » Wed Jan 24, 2018 2:15 am

I just need to figure out why the DAC output is not operating.
The DAC output is enabled by setting PTT to True either directly in the sink block settings or by checking the ptt checkbox in the GUI.

tech62
Posts: 29
Joined: Wed Mar 29, 2017 12:31 pm

Re: Simple complex-analog-IO function

Post by tech62 » Thu Jan 25, 2018 8:29 am

Dear Pavel,

This is marvellous ! Thanks so much...I did not think of setting that checkbox at all (kicking myself :o )
It is now outputting 1kHz quadrature signals as expected. I can now continue to explore using GRC to work with more complex IQ signals through the RP. Very exciting !

My current setup connects a PC running GRC directly to the RP via a cat5 crossover cable.
It is very convenient that the application you have setup on the RP defaults to 192.168.1.100 in the absence of DHCP.

Thanks again.
Warm regards.

tech62
Posts: 29
Joined: Wed Mar 29, 2017 12:31 pm

Re: Simple complex-analog-IO function

Post by tech62 » Tue Jan 30, 2018 4:20 am

Hello,

This is working well for me and I'm looking to further my understanding of the system.

Could someone please direct me to information about how the Center Freq and Sampling Rate parameters passed to the RP Wide sink/source blocks in GR are implemented into the FIR and CIC blocks within the FPGA ?

Also, some info on how the DDS and Complex Multiplier are affected by these parameters mentioned above...since these are the main rate control parameters for this system, at least from a GRC perspective.

Perhaps there is some documentation other than the source code itself ?

Thanks again.

tech62
Posts: 29
Joined: Wed Mar 29, 2017 12:31 pm

Re: Simple complex-analog-IO function

Post by tech62 » Sat Feb 03, 2018 7:38 am

For this, you'll still need the up- and down- converters (CIC and FIR filters) to convert to and from the DAC and ADC sample rates (125 MSPS).
To clarify my question...what I was wondering is how is the conversion rates by CIC and FIR setup ?

Are there a limited number of combinations of possible rates ?
How is this determined ?

Any hints appreciated.
Regards.

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