Need example code of PID and FIR filter using verilog

[amin]

Hi guys,

I am new to FPGA programming and using verilog.
I have been trying this code:
viewtopic.php?f=14&t=326&p=7568&hilit=verilog#p7568
but i still did not get response signal generator in DIO0P and DIO1P.
Could you guys give me simple code to make PID and filter application using verilog or IP block?

Thank you in advance,

[pavel]

I think that the easiest way to implement a PID controller is with Vivado HLS as explained in XAPP1163.

There is also an example of a PID controller in the Xilinx/HLx_Examples repository.

[amin]

Pavel,

Thank you for your answer.
Now i am trying to learn the combination configuration between FDAtool matlab and FIR compiler to make lowpass filter. I have a problem with this configuration as i mentioned in another topic:
viewtopic.php?f=14&t=1785&p=8212#p8212


Thanks in advance,

[amin]

Pavel,

Until now i cannot put COE file into my FIRcompiler.
i got error message:

Tcl error in update procedure while settig value 'COE_File' on the parameter 'CoefficientSource'. can't use non-numeric string as operand of "*"

as you can see in the image below (error= red font)

FIRerror.PNG

How to get COE file:
I am trying to use COE of FDAtool. as shown below

FDAtool.PNG

i set a "filter arithmatic" as "fixed point".
without fixed point setting, i cannot export to COE file.

FDAtoolfilterarthmatic.PNG

I also attach the COE file.

if anyone have same problem please let me know

Thanks