Errors in Constraint File when programming FPGA under ISE

Applications, development tools, FPGA, C, WEB
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emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Errors in Constraint File when programming FPGA under ISE

Post by emyemy » Sat Aug 02, 2014 12:38 am

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I add the Constraint File from github and use it to program the FPGA in RP. After Synthesize is done in ISE, I double clicked the Implement the Design and got errors on almost all the constraints. Does anyone know how to fix it?
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Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Errors in Constraint File when programming FPGA under IS

Post by Nils Roos » Tue Aug 05, 2014 6:55 pm

Am I correct in assuming you are not using the entire RedPitaya code base but just cherry-picked some source files from the repo ?

If that is the case you might achieve better results by starting with the full RP code and strip the things that you are not giong to need in your design.
That way you have a known good position to fall back to and analyse what went wrong every time you run into problems.

emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Re: Errors in Constraint File when programming FPGA under IS

Post by emyemy » Tue Aug 05, 2014 9:15 pm

Thank you Nils. I successfully compiled my code, but i have no idea how can I load my bit file into the board. It seems that i have to save my bit file into MicroSD card. Do you have any idea on how to run and load the fpga codes (which is the only part that I want to use, i treat red pitaya as a fpga board currently)? I use Linux OS and Windows OS. So, any instructions under these two OS will be helpful for me. Looking forward to your answer. I am kinda in a hurry.:)

Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Errors in Constraint File when programming FPGA under IS

Post by Nils Roos » Tue Aug 05, 2014 10:19 pm

If you have a JTAG adapter available, you can load the bitstream directly into the RedPitaya. Otherwise you need to build at least a first stage boot loader (fsbl) to get the bitstream from the microSD into the RP. Hit up the Xilinx wiki for more information about that or take your pointers from the RedPitaya build process.

emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Re: Errors in Constraint File when programming FPGA under IS

Post by emyemy » Tue Aug 05, 2014 11:06 pm

I see. Another question, I met errors message when access the ssh connection with red pitaya in linux: it says"connect to root@192.168.1.100: No route to host" and when I do ssh root@192.168.1.100 in OS X I have a message :"timed out connection" I double check the Ethernet connection, it seems to have no connection problem in hardware, I have no idea how to set the ssh connection right. Do you know the possible cause? This problem has been annoying me for 2 days, i feel bad about it.:(

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