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Developing FPGA code using Vivado

Posted: Mon Jul 06, 2020 11:33 pm
by Schrodinger1933
Hello all,

I am working with a Red Pitaya STEMLab 125-14 V1.0 board, and Vivado version 2019.2. Following the Vivado workflow, I understand that I have the option to chose a board file when starting a new project, which will simplify automatic connections, and allow use of the GUI. However, from searching the forums I found a post from 2016 by user "dl3hm" which resulted in Nils Roos to explain the board file is not complete. I also found a post from early 2016 by user "k4rm4n" where they stated they could develop using the RP as a custom board if they have the board definition file, ports and clocks constraints file, and IP cores for ADC and DAC (this was confirmed by Pavel). I have the following questions:
1) Is there a difference between a "board definition file" and a board file?
2) From what I understood from the referenced posts, the RP board file is not complete, but Vivado development can proceed with the GUI and correct automatic connections if a custom board is defined by the files mentioned by Pavel. Does having the files Pavel mentioned work as an equivalent "replacement" to the board file?

Thank you for any and all help/suggestions.