Questions on Makefile

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emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Questions on Makefile

Post by emyemy » Fri Aug 15, 2014 2:22 am

Hi guys, I tried to use makefile in the top path and in the fpga path in the github and met the message below. Hope you can help me figure out how to handle them.
1) Error messages in FPGA make

Code: Select all

make[1]: Leaving directory `/home/emily/RedPitaya/FPGA/release1/fpga/ahead/red_pitaya.sdk/SDK/SDK_Export/device-tree_bsp_0'
make -C ahead/red_pitaya.sdk/SDK/SDK_Export/uboot_bsp_0/ -k all
make[1]: Entering directory `/home/emily/RedPitaya/FPGA/release1/fpga/ahead/red_pitaya.sdk/SDK/SDK_Export/uboot_bsp_0'
libgen -hw ../hw/system.xml\
-lp ../bsp_repos\
-pe ps7_cortexa9_0 \
-log libgen.log \
system.mss
libgen
Xilinx EDK 14.6 Build EDK_P.68d
Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved.

Command Line: libgen -hw ../hw/system.xml -lp ../bsp_repos -pe ps7_cortexa9_0
-log libgen.log system.mss


Staging source files.
Running DRCs.
#--------------------------------------
# uboot BSP DRC...
#--------------------------------------
Running generate.
#--------------------------------------
# uboot BSP generate...
#--------------------------------------
Not find correct clock frequency
/* Main Memory is ps7_ddr_0 */
FLASH doesn't exists
INFO automatic U-BOOT position = 0x1fc00000
Running post_generate.
Running execs_generate.
Finished building libraries
make[1]: Leaving directory `/home/emily/RedPitaya/FPGA/release1/fpga/ahead/red_pitaya.sdk/SDK/SDK_Export/uboot_bsp_0'
make -C image/ FPGA_TOOL=ahead -k all
make[1]: Entering directory `/home/emily/RedPitaya/FPGA/release1/fpga/image'
cp ../ahead/red_pitaya.runs/impl_1/red_pitaya_top.bit out/fpga.bit
cp: cannot create regular file ‘out/fpga.bit’: No such file or directory
make[1]: *** [bootbin] Error 1
cp ../ahead/red_pitaya.sdk/SDK/SDK_Export/device-tree_bsp_0/ps7_cortexa9_0/libsrc/device-tree_v0_00_x/xilinx.dts out/devicetree.dts
cp: cannot create regular file ‘out/devicetree.dts’: No such file or directory
make[1]: *** [devicetree] Error 1
make[1]: Target `all' not remade because of errors.
make[1]: Leaving directory `/home/emily/RedPitaya/FPGA/release1/fpga/image'
make: *** [image] Error 2
2) Errors message in top make

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make[3]: Leaving directory `/home/emily/RedPitaya/FPGA/release1/fpga/ahead/red_pitaya.sdk/SDK/SDK_Export/fsbl/Debug'
make[2]: Leaving directory `/home/emily/RedPitaya/FPGA/release1/fpga'
cp release1/fpga/ahead/red_pitaya.sdk/SDK/SDK_Export/fsbl/Debug/fsbl.elf /home/emily/RedPitaya/build/memtest.elf
cp release1/fpga/ahead/red_pitaya.runs/impl_1/red_pitaya_top.bit /home/emily/RedPitaya/build/fpga.bit
cp release1/fpga/ahead/red_pitaya.sdk/SDK/SDK_Export/device-tree_bsp_0/ps7_cortexa9_0/libsrc/device-tree_v0_00_x/xilinx.dts /home/emily/RedPitaya/build/devicetree.dts
patch /home/emily/RedPitaya/build/devicetree.dts release1/fpga/image/src/device_tree_ahead.patch
patching file /home/emily/RedPitaya/build/devicetree.dts
Hunk #1 succeeded at 150 (offset -6 lines).
Hunk #2 succeeded at 178 with fuzz 2 (offset -14 lines).
Hunk #3 FAILED at 390.
1 out of 3 hunks FAILED -- saving rejects to file /home/emily/RedPitaya/build/devicetree.dts.rej
make[1]: *** [install] Error 1
make[1]: Leaving directory `/home/emily/RedPitaya/FPGA'
make: *** [build/fpga.bit] Error 2
Last edited by emyemy on Mon Aug 18, 2014 5:08 am, edited 1 time in total.

emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Re: Questions on Makefile

Post by emyemy » Fri Aug 15, 2014 2:24 am

I use the commads below to execute makefile:
1) for Makefile in the top path:

Code: Select all

source /14.6/ISE_DS/settings64.sh
cd RedPitaya
export CROSS_COMPILE=arm-xilinx-gnueabi-
make
2) for Makefile in the /FPGA path:

Code: Select all

source /14.6/ISE_DS/settings64.sh
cd RedPitaya/FPGA/release1/fpga
export CROSS_COMPILE=arm-xilinx-gnueabi-
make

emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Re: Questions on Makefile

Post by emyemy » Mon Aug 18, 2014 5:11 am

I fixed the first problem by creating a folder called out in the /FPGA/release1/fpga. But I didn't know how to fix the second problem. :(

Crt Valentincic
Posts: 67
Joined: Wed May 28, 2014 12:15 pm

Re: Questions on Makefile

Post by Crt Valentincic » Mon Aug 18, 2014 2:37 pm

Please check that you used right patch, there are two different patches for Vivado and Ahead.
https://github.com/RedPitaya/RedPitaya/ ... /image/src

emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Re: Questions on Makefile

Post by emyemy » Mon Aug 18, 2014 6:48 pm

I checked all the makefile and I modified the TOOL from vivado to ahead. The fpga environment I set using source is ISE_DS(the path/settings64.sh). The same error just came out.

emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Re: Questions on Makefile

Post by emyemy » Tue Aug 19, 2014 10:55 am

My way of making file is to generate a bit file using ISE14.6 and save it in the path in a created folder impl_1 and then run make in the path RedPitaya. Does it matter if there is one error in patch?

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