Hi,
I am starting to enjoy the RedPitaya system as it allows me to learn about FPGA design.
I can use the already build FPGA project to make modifications ... which is a great way to learn!
However I find the design loop very long: edit-compile-upload-test----edit-compile-test----.... For instance, when I make a modification in the Verilog code, I have to "recompile" the entire FPGA design. I have the impression that the Verilog files that were not touched are also recompiled. It takes around 10 minutes to complete the loop (I have a system that is 8 years old ). Is there not and FPGA equivalent of dll's or lib's? Things that are already compiled don't need to be recompiled again to speedup the build process?
Regards
Marc
FPGA library
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- Posts: 1441
- Joined: Sat Jun 07, 2014 12:49 pm
- Location: Königswinter
Re: FPGA library
Hi Marc,
fellow Red Pitaya user hmaarrfk did some experiments with incremental compilation of the fpga bitstream.
Take a look at his thread (FPGA incremental build) with a link to his github fork.
Other than that, the closest thing to libraries in Vivado are block designs and IP blocks. But to benefit from these mechanics, you would need to rewrite much of the existing fpga codebase.
fellow Red Pitaya user hmaarrfk did some experiments with incremental compilation of the fpga bitstream.
Take a look at his thread (FPGA incremental build) with a link to his github fork.
Other than that, the closest thing to libraries in Vivado are block designs and IP blocks. But to benefit from these mechanics, you would need to rewrite much of the existing fpga codebase.
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