Slow DAC

[GeorgB613]

Hey guys,

I work with the Slow DAC of the extension connector and was wondering, why my output is a triangular waveform.
Referring to the RedPitaya_HDL_memory_map.odt I understand the PWM output to be a rectangular signal with adjustable duty cycle. Instead, I get a modulated signal with an offset which relates to the PWM value set in the PWM DACx register (AMS section of the memory map).
I guess I don't understand the slow DAC correctly. Can anybody summarize how the PWM DAC works? Especially, what the PWM value does [23:16] and what the remaining bits [15:0] are intended to do.

BR Georg

[Nils Roos]

Reposting from the old forum:

The PWM module runs a counter from 1 - 156 on a 250MHz clock. This counter is the compare value for the PWM, so the PWM frequency is actually 250MHz / 156 ~= 1.6MHz.
The counter is compared against the upper 8 bits of the 24 bit DAC data channels A-D, and the output goes high if the counter is smaller than the data value (DAC data 0x000000=> 0%, 0x9C0000=> 100% duty cycle).

But wait, this gives us only log2(157) = 7.3 bits of resolution, right ? And what happens with the lower 16 bit of the DAC data ?

The lower 16 bit are each tested in turn over 16 PWM periods, and if a 1 is found, the compare value is incremented by 1 for one period. Averaging over 16 PWM cycles yields another log2(16) = 4 bit of resolution from the ratio between 0 and 1 bits in the lower 16 bit of the DAC data.

After 16 PWM cycles a new DAC data value is read, which leads us to 1.6MHz / 16 = 100ksps at a (theoretical) resolution of 11.3 bit.

In that light, a 1st order cut-off frequency of 200kHz seems sufficient to remove the PWM frequency of 1.6MHz and perform the averaging over 16 cycles.

To summarize:

1. the triangular ripple you are observing is an artefact from the averaging filter being applied to the PWM square wave
2. the number of 1-bits (0-15) in the lower 16 bit of the PWM value give 4 bit of additional resolution

[GeorgB613]

Hi Nils

This was again a very fast reply, thanks!
So the upper 8 bits (or more precise 7.3 bits) are coarse resolution, whereas the lower 16 bit yield a fine gradation.
But how do I use these[15:0] bits correctly? Could you give an example?
Is it like:
0x0001, 0x0002, 0x0004, 0x0008, 0x0010 ... 0x8000 => 1*res_coarse/16, 2*res_coarse/16, ... 16*res_coarse/16

[Nils Roos]

It's the number of 1s that determines the fine value. 0x0001 .. 0x8000 will all give the same average of 1/16th of one coarse step.
0000000000000001 => one 1-bit = 1/16th
0000000000000011 => two 1-bits = 2/16th
...
0111111111111111 => fifteen 1-bits = 15/16th

Sixteen 1-bits give you 16/16th of one coarse step which is the same as the next coarse step with sixteen 0-bits - 0x80ffff gives the same output as 0x810000.
The position of the 1s and 0s does not matter for the average, only the count. You may observe different kinds of ripple for different patterns of 1s though: 1010101010101010 will give a slightly different ripple than 1111111100000000, but both average to 8/16th.

[GeorgB613]

OK, now it's clear.
Thanks a lot!