decimation factor

[Ronny Comyn]

Hello,

could someone explain me the decimation factor please?
What is it doing exactly?
Can I use it to sample at slower sample rates?

Kind regards,
Ronny

[noah]

It's exactly what you wrote!

It devides the base sample clock (125MSps) by a factor thats a binary number (2 to the power of n). This allows a lower samplerate.

Additionally you can enable averaging which basically takes the average of the 'lost' samples if you are running a lower samplerate.

Does that answer your question?

[Ronny Comyn]

Thanks a lot Noah!
So if I need a sample rate of about 2 Mhz , I just need to choose a decimation of 64 , correct?
How do I activate averaging in command line please?
Thanks,
Ronny

[noah]

Yes thats right.

Unfortunately the acquire tool doesn't support the averaging feature (to my knowledge). But you can turn it on by writing to the FPGA register like so:

Code: Select all

monitor 0x40100028 1

and to disable it

Code: Select all

monitor 0x40100028 0

[Ronny Comyn]

Thanks Noah!

The 'monitor' command, is just a command I enter in the secure shell terminal, before
entering the acquire command?
Is there also a command to trigger on a digital line (falling edge, digital line 0)?

Thanks in advance!
Ronny

[noah]

The 'monitor' command, is just a command I enter in the secure shell terminal, before entering the acquire command?

Correct.

Is there also a command to trigger on a digital line (falling edge, digital line 0)?

Indeed there is! Take a look at the Red Pitaya FPGA memory map. The register 0x40100004 defines the trigger source. So if you write to it the value 6 the trigger source will be

external trigger positive edge - DIO0_P pin

The command would be

Code: Select all

monitor 0x40100004 6

I hope that works.

Cheers, Noah