bare metal app

Applications, development tools, FPGA, C, WEB
Mike1010
Posts: 23
Joined: Mon Jun 15, 2015 8:02 pm

Re: bare metal app

Post by Mike1010 » Mon Jun 15, 2015 11:03 pm

thanks pavel and nils!

this would be my app_cpu1.c, any feedback?

Code: Select all

#define LED_PORT 0x40000030

void toogle_led(unsigned int *led_port, const int led_pin) {
    *led_port ^= ( 1 << led_pin ); 
}

int main () {
    volatile unsigned int *led_port = (unsigned int*)(LED_PORT);

    while (true) {
        toogle_led(led_port, 3);
        sleep(100); // ms, need to lookup which header is required here
    }
}
Last edited by Mike1010 on Mon Jun 15, 2015 11:08 pm, edited 1 time in total.

pavel
Posts: 550
Joined: Sat May 23, 2015 5:22 pm

Re: bare metal app

Post by pavel » Mon Jun 15, 2015 11:06 pm

There are some interesting updates at

http://www.wiki.xilinx.com/XAPP1078+Latest+Information
Since the FSBL in EDK14.5 supports multiple ELF files, continue following the steps documented in the XAPP but during creation of the FSBL, select the template 'Zynq FSBL'. The 'Zynq FSBL for AMP' template is no longer required and has been removed from the design.
Looks like FSBL should not be modified when working with more recent SDK versions.

Mike1010
Posts: 23
Joined: Mon Jun 15, 2015 8:02 pm

Re: bare metal app

Post by Mike1010 » Mon Jun 15, 2015 11:09 pm

you refer to Vivado 2015.1 SDK? is the a default project for Vivado 2015.1 to compile my app_cpu1.c and generate app_cpu1.elf?

What i also need is the lscript.ld and which i need to modify...
Last edited by Mike1010 on Mon Jun 15, 2015 11:13 pm, edited 1 time in total.

pavel
Posts: 550
Joined: Sat May 23, 2015 5:22 pm

Re: bare metal app

Post by pavel » Mon Jun 15, 2015 11:12 pm

Again from http://www.wiki.xilinx.com/XAPP1078+Latest+Information
FSBL now supports multiple ELF files so the customized FSBL has been removed from the repository and the dummy cpu1_bootvec.bin file is no longer required so it has been removed from the bootgen .bif file.
So bootgen.bif should look like the following if you use the original RedPitaya Makefile:

Code: Select all

img: {[bootloader] fsbl.elf red_pitaya_top.bit u-boot.elf app_cpu1.elf}
or if you use my Makefile the following commands should be used:

Code: Select all

echo "img:{[bootloader] tmp/red_pitaya_0_92.fsbl/executable.elf tmp/red_pitaya_0_92.bit tmp/u-boot.elf app_cpu1.elf}" > tmp/boot.bif
bootgen -image tmp/boot.bif -w -o i boot.bin
Last edited by pavel on Tue Jun 16, 2015 7:46 am, edited 1 time in total.

Mike1010
Posts: 23
Joined: Mon Jun 15, 2015 8:02 pm

Re: bare metal app

Post by Mike1010 » Mon Jun 15, 2015 11:13 pm

thanks pavel.

i want to use your makefile: https://github.com/pavel-demin/red-pitaya-notes

may i ask how 0xFFFFFFF0 gets calculated?

i plan to use modifiy device tree as follows, it it compliant with the rest of your build? so my bare metal app can use 12 MB ram.

Code: Select all

memory {
 device_type = "memory";
 reg = <0x00000000 1F400000>;
};

pavel
Posts: 550
Joined: Sat May 23, 2015 5:22 pm

Re: bare metal app

Post by pavel » Mon Jun 15, 2015 11:24 pm

you refer to Vivado 2015.1 SDK? is the a default project for Vivado 2015.1 to compile my app_cpu1.c and generate app_cpu1.elf?
Yes, I'm using Vivado 2015.1. At the very end of http://www.wiki.xilinx.com/XAPP1078+Latest+Information there is a zip file for Vivado 2014.4:
http://www.wiki.xilinx.com/file/view/xa ... 2014.4.zip

Maybe it'll work with Vivado 2015.1.
may i ask how 0xFFFFFFF0 gets calculated?
I don't know how it's calculated. It's just taken from page 4 of XAPP1078:
Within this AMP example’s project files, the FSBL has been modified to continue searching for
files and loading them into memory until it detects a file that has a load address of
0xFFFFFFF0.

pavel
Posts: 550
Joined: Sat May 23, 2015 5:22 pm

Re: bare metal app

Post by pavel » Mon Jun 15, 2015 11:29 pm

Actually, I don't know what [load = 0xFFFFFFF0] is doing. I've just copied it from Nils.

Maybe Nils could suggest how boot.bif should look like without cpu1_bootvec.bin?

pavel
Posts: 550
Joined: Sat May 23, 2015 5:22 pm

Re: bare metal app

Post by pavel » Mon Jun 15, 2015 11:33 pm

i plan to use modifiy device tree as follows, it it compliant with the rest of your build? so my bare metal app can use 12 MB ram.
I'd suggest you to keep 0x1E000000 since it's hardcoded in several other patches.

Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: bare metal app

Post by Nils Roos » Mon Jun 15, 2015 11:34 pm

I'm slowly catching up on the updates to the app-note^^

Without the need for cpu1_bootvec.bin, the whole section can be omitted, including the [load ...] part.

Mike1010
Posts: 23
Joined: Mon Jun 15, 2015 8:02 pm

Re: bare metal app

Post by Mike1010 » Mon Jun 15, 2015 11:38 pm

pavel i found this info in app note (this is for Bare-Metal System Running on Both Cortex-A9 Processors but we can still extract the following info, in my case i want CPU0 Linux, CPU1 bare metal): http://www.xilinx.com/support/documenta ... tex-a9.pdf
Before the bootloader started running the FSBL, it created a small application at
0xFFFFFF00 and set the CPU1 program counter to this location. This application checks the
contents of 0xFFFFFFF0 and if it is 0, executes the Wait For Event (WFE) instruction. Every
time an event occurs, CPU1 wakes up and reruns the loop where it checks 0xFFFFFFF0 for a
non-zero value. As soon as a non-zero value is detected, CPU1 jumps to the address location
that was read from 0xFFFFFFF0. In this case, the value is 0x00200000, which is the starting
address of the CPU1 application as defined in the lscript.ld linkerscript for the app_cpu1
application.
Last edited by Mike1010 on Mon Jun 15, 2015 11:42 pm, edited 2 times in total.

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