Error when Compiling FPGA code

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Kev' Ttn
Posts: 55
Joined: Tue Jun 24, 2014 3:06 pm
Location: Dourdan (France)

Error when Compiling FPGA code

Post by Kev' Ttn » Mon Jul 07, 2014 1:50 pm

Hi everyone !

Last week, I wanted to change the FPGA code of the RP, but when I compile my FPGA I have an error. Before I didn't have this error. Maybe someone can help me.

This is the error :

Code: Select all

make FPGA_TOOL=vivado fpga

vivado -mode tcl - source $PWD/run_vivado.tcl - tclargs fpga
/bin/sh: 1: vivado: not found
make: ***[fpga] Erreur 127
This error appends on my code and on the original code I download on GitHub. I don't know why this operation doesn't work. Last week, I could compile without any problem.

Thanks in advance.
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Kev' Ttn
Posts: 55
Joined: Tue Jun 24, 2014 3:06 pm
Location: Dourdan (France)

Re: Error when Compiling FPGA code

Post by Kev' Ttn » Mon Jul 07, 2014 2:42 pm

I have just find my error. In fact, that was Vivado which were not in bashrc. So my command didn't find this software. I think this error is dued to a update but doesn't matter.

Now it works ! :)
Top
emyemy
Posts: 26
Joined: Thu Jul 31, 2014 1:28 am

Re: Error when Compiling FPGA code

Post by emyemy » Wed Aug 06, 2014 9:44 am

Hi I am new to RP. I am currwntly trying to compile the fpga code as well but i have no idea how to start that. I've read the FPGA development environment on wiki but I dont really get it. Could you tell me the details on each steps you made to make the compile successful. i'd be grateful for your help
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Kev' Ttn
Posts: 55
Joined: Tue Jun 24, 2014 3:06 pm
Location: Dourdan (France)

Re: Error when Compiling FPGA code

Post by Kev' Ttn » Tue Oct 21, 2014 1:25 pm

Hi,

I'm sorry, I didn't see your post before today ... I hope you solved your problem. If not, tell me and I'll help you :)

Today, I have a new problem. I try to compile a FPGA project, but it always fails. I don't know why, so I took the project on the git and I try to compile it and I can't. I have some errors when I execute the "sw_package" and "image" commands. "fpga" and "clear" commands work perfectly.

Someone can post a tutoriel to compile correctly a FPGA project ? Because, I think I miss something ...

Thanks in advance.

Regards.

Kev' Ttn
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Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Error when Compiling FPGA code

Post by Nils Roos » Tue Oct 21, 2014 9:25 pm

@Kev' Ttn
It would be helpfull if you could attach your actual make commands and some console output from the failing builds.

Off the bat, did you prepare with

Code: Select all

source <path to your xilinx installation>/Xilinx/Vivado/2013.3/settings<32/64>.sh
export CROSS_COMPILE=arm-xilinx-eabi-
resp.

Code: Select all

source <path to your xilinx installation>/Xilinx/14.6/ISE_DS/settings<32/64>.sh
export CROSS_COMPILE=arm-xilinx-eabi-
?

Good luck
Nils
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Kev' Ttn
Posts: 55
Joined: Tue Jun 24, 2014 3:06 pm
Location: Dourdan (France)

Re: Error when Compiling FPGA code

Post by Kev' Ttn » Wed Oct 22, 2014 8:49 am

Hi Nils,

First of all, thank you for your quick answer. :)

About your last post, yes I have prepared the compilation with these commands. I didn't post the errors because it take more than 400 lines. But you can see it just below.

Code: Select all

spoonman@SPOONMAN:~/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga$ make sw_package
sed -i 's/C_SDIO_CLK_FREQ_HZ\"\ VALUE=\"50000000/C_SDIO_CLK_FREQ_HZ\"\ VALUE=\"125000000/' vivado/red_pitaya.sdk/SDK/SDK_Export/hw/system.xml
cp vivado/red_pitaya.sdk/SDK/SDK_Export/hw/ps7_init.*    vivado/red_pitaya.sdk/SDK/SDK_Export/fsbl/src/ 
make -C vivado/red_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/ -k all
make[1]: entrant dans le répertoire « /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_pitaya.sdk/SDK/SDK_Export/fsbl_bsp »
libgen -hw ../hw/system.xml\
	       -lp ../bsp_repos\
	       -pe ps7_cortexa9_0 \
	       -log libgen.log \
	       system.mss
WARNING: fr_FR is not supported as a language.  Using usenglish.
libgen
Xilinx EDK 14.6 Build EDK_P.68d
Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.

Command Line: libgen -hw ../hw/system.xml -lp ../bsp_repos -pe ps7_cortexa9_0
-log libgen.log system.mss 

ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 63 - Cannot find MDD
   file devcfg_v2_1_0.mdd for the driver devcfg 2.04.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/devcfg_v2_04_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/devcfg_v2_04_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/devcfg_v2_04_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/devcfg_v2_04_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/devcfg_v2_04_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/devcfg_v2_04_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/devcfg_v2_04_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/devcfg_v2_04_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/devcfg_v2_04_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/devcfg_v2_04_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 69 - Cannot find MDD
   file dmaps_v2_1_0.mdd for the driver dmaps 1.06.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/dmaps_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/dmaps_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/dmaps_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/dmaps_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/dmaps_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/dmaps_v1_06_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/dmaps_v1_06_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/dmaps_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/dmaps_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/dmaps_v1_06_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 75 - Cannot find MDD
   file dmaps_v2_1_0.mdd for the driver dmaps 1.06.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/dmaps_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/dmaps_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/dmaps_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/dmaps_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/dmaps_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/dmaps_v1_06_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/dmaps_v1_06_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/dmaps_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/dmaps_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/dmaps_v1_06_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 81 - Cannot find MDD
   file emacps_v2_1_0.mdd for the driver emacps 1.05.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/emacps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/emacps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/emacps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/emacps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/emacps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/emacps_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/emacps_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/emacps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/emacps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/emacps_v1_05_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 93 - Cannot find MDD
   file gpiops_v2_1_0.mdd for the driver gpiops 1.02.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/gpiops_v1_02_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/gpiops_v1_02_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/gpiops_v1_02_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/gpiops_v1_02_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/gpiops_v1_02_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/gpiops_v1_02_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/gpiops_v1_02_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/gpiops_v1_02_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/gpiops_v1_02_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/gpiops_v1_02_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 105 - Cannot find MDD
   file iicps_v2_1_0.mdd for the driver iicps 1.04.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/iicps_v1_04_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/iicps_v1_04_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/iicps_v1_04_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/iicps_v1_04_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/iicps_v1_04_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/iicps_v1_04_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/iicps_v1_04_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/iicps_v1_04_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/iicps_v1_04_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/iicps_v1_04_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 135 - Cannot find MDD
   file qspips_v2_1_0.mdd for the driver qspips 2.03.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/qspips_v2_03_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/qspips_v2_03_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/qspips_v2_03_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/qspips_v2_03_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/qspips_v2_03_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/qspips_v2_03_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/qspips_v2_03_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/qspips_v2_03_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/qspips_v2_03_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/qspips_v2_03_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 165 - Cannot find MDD
   file scugic_v2_1_0.mdd for the driver scugic 1.05.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/scugic_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/scugic_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/scugic_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/scugic_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/scugic_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/scugic_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/scugic_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/scugic_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/scugic_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/scugic_v1_05_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 195 - Cannot find MDD
   file spips_v2_1_0.mdd for the driver spips 1.06.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/spips_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/spips_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/spips_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/spips_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/spips_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/spips_v1_06_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/spips_v1_06_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/spips_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/spips_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/spips_v1_06_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 201 - Cannot find MDD
   file spips_v2_1_0.mdd for the driver spips 1.06.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/spips_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/spips_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/spips_v1_06_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/spips_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/spips_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/spips_v1_06_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/spips_v1_06_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/spips_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/spips_v1_06_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/spips_v1_06_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 207 - Cannot find MDD
   file uartps_v2_1_0.mdd for the driver uartps 1.05.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/uartps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/uartps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/uartps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/uartps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/uartps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/uartps_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/uartps_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/uartps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/uartps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/uartps_v1_05_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 213 - Cannot find MDD
   file uartps_v2_1_0.mdd for the driver uartps 1.05.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/uartps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/uartps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/uartps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/uartps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/uartps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/uartps_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/uartps_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/uartps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/uartps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/uartps_v1_05_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 219 - Cannot find MDD
   file usbps_v2_1_0.mdd for the driver usbps 1.05.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/usbps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/usbps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/usbps_v1_05_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/usbps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/usbps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/usbps_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/usbps_v1_05_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/usbps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/usbps_v1_05_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/usbps_v1_05_a/data
ERROR:EDK:3323 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 225 - Cannot find MDD
   file xadcps_v2_1_0.mdd for the driver xadcps 1.02.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/drivers/xadcps_v1_02_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/pcores/xadcps_v1_02_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/drivers/xadcps_v1_02_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/pcores/xadcps_v1_02_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/drivers/xadcps_v1_02_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/pcores/xadcps_v1_02_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/drivers/xadcps_v1_02_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/pcores/xadcps_v1_02_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/drivers/xadcps_v1_02_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/pcores/xadcps_v1_02_a/data
INFO:EDK:772 - Check the following for possible causes of not finding MDD:
  - If DRIVER_VER is specified in MSS, it must follow literal form X.YY.Z
  - There is no driver with given name
  - Driver exists but not that version
  - Driver and version (directory) exist but no MDD is available

ERROR:EDK:3326 -
   /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/r
   ed_pitaya.sdk/SDK/SDK_Export/fsbl_bsp/system.mss line 5 - Cannot find MLD
   file standalone_v2_1_0.mld for the os standalone 3.11.a
INFO:EDK:1040 - Directories Searched :
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/fsbl_bsp/bsp/standalone_v3_11_a/data
  -
/home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_
pitaya.sdk/SDK/SDK_Export/bsp_repos/bsp/standalone_v3_11_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/lib/bsp/standalone_v3_11_a/data
  -
/opt/Xilinx/14.6/ISE_DS/EDK/sw/XilinxProcessorIPLib/bsp/standalone_v3_11_a/data
  - /opt/Xilinx/14.6/ISE_DS/EDK/sw/ThirdParty/bsp/standalone_v3_11_a/data
INFO:EDK:773 - Check the following for possible causes of not finding MLD:
  - If OS_VER is specified in MSS, it must follow literal form X.YY.Z
  - There is no OS with given name
  - OS exists but not that version
  - OS and version (directory) exist but no MLD is available

ERROR:EDK:1204 - Errors occured while creating Software System.
make[1]: *** [ps7_cortexa9_0/lib/libxil.a] Erreur 2
make[1]: La cible « all » n'a pas pu être refabriquée à cause d'erreurs.
make[1]: quittant le répertoire « /home/spoonman/Bureau/RP_initial/RedPitaya-master/FPGA/release1/fpga/vivado/red_pitaya.sdk/SDK/SDK_Export/fsbl_bsp »
make: *** [fsbl_bsp] Erreur 2
I reboot my PC many times and it doesn't change anything.

Thanks in advance.

Kev' Ttn
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Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Error when Compiling FPGA code

Post by Nils Roos » Wed Oct 22, 2014 10:56 am

You seem to be doing a Vivado build, but your search path for driver components points to the ISE directories.

Have you sourced the Vivado settings (/opt/Xilinx/Vivado/2013.3/settingsxx.sh) ?
Top
Kev' Ttn
Posts: 55
Joined: Tue Jun 24, 2014 3:06 pm
Location: Dourdan (France)

Re: Error when Compiling FPGA code

Post by Kev' Ttn » Wed Oct 22, 2014 11:39 am

Yes I use Vivado source. But I think I've found my mistake.

At the beginning I wrote :

Code: Select all

source /opt/Xilinx/Vivado/2013.3/settings64.sh
and just after

Code: Select all

source /opt/Xilinx/14.2/ISE_DS/settings64.sh
Is it correct to use these commands one after the other ?
Top
Kev' Ttn
Posts: 55
Joined: Tue Jun 24, 2014 3:06 pm
Location: Dourdan (France)

Re: Error when Compiling FPGA code

Post by Kev' Ttn » Wed Oct 22, 2014 1:20 pm

Sorry for this double post.

When I reboot my computer and enter only the first command (for Vivado), I have another message.

It say : libgen : non-existing command Error 127.

Moreover, do I need an Internet connection to compile ?

Regards.

Kev' Ttn
Top
Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Error when Compiling FPGA code

Post by Nils Roos » Wed Oct 22, 2014 7:59 pm

I think you will find the experiences described in this thread helpful.

Short summary: with Vivado, you will need to source the SDK settings as well (/opt/Xilinx/SDK/2013.3/settings64.sh).

edit: For some reason I don't need to do it in my setup, though.
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