Loading custom FPGA bitfile at startup for internal clock

Applications, development tools, FPGA, C, WEB
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lene85
Posts: 23
Joined: Tue Sep 08, 2015 3:04 pm

Loading custom FPGA bitfile at startup for internal clock

Post by lene85 » Sun Oct 25, 2015 2:22 pm

Hi,

I am planning to synchronize my RedPitaya with other instruments in the lab. Those provide a 10MHz signal for synchronization. As far as I have understood, I should be able to use this as input to a MMCM module inside the FPGA to derive a 125 MHz clock signal for the RedPitaya. I then plan to replace the crystal clock with this signal by by moving two 0-Ohm resistors (as described in the hardware manual somewhere).
My only concern is that by doing so, there will be no clock signal until the FPGA code initializing the MMCM is loaded. I am not sure but I think this will also prevent the PS from working. So I would need my custom bitfile to be loaded right during the startup sequence. I have not found where the default bitfile is located in the SD-card filesystem. Does anybody know where this happens, and what I have to do to replace it?

Thanks a lot! Lenny

Nils Roos
Posts: 1441
Joined: Sat Jun 07, 2014 12:49 pm
Location: Königswinter

Re: Loading custom FPGA bitfile at startup for internal cloc

Post by Nils Roos » Sun Oct 25, 2015 2:44 pm

Hi Lenny,

No need to worry, the PS is clocked independently of the PL by a separate crystal oscillator; furthermore, the settings for the PLL which generates the internal clocks are not part of the fpga bitstream.
Does anybody know where this happens, and what I have to do to replace it?
The default bitstream is lumped together with the first and second stage bootloader into the file "boot.bin". There's many a thread in this forum that deals with the manufacture of that file, if you still want to find out about it.

lene85
Posts: 23
Joined: Tue Sep 08, 2015 3:04 pm

Re: Loading custom FPGA bitfile at startup for internal cloc

Post by lene85 » Sun Oct 25, 2015 2:47 pm

Cool thanks! :D

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