DMA problems with new Red Pitaya OS

[Maximilian L]

Hello all,

I want to use the AXI Direct Memory Access (DMA) IP Core in Vivado for storing some data in the DDR3 memory. I already have a bitstream that is working with the old OS Version 0.94 and use of the DMA in Direct Register Mode. The only problem I am facing here is that the S2MM Status Register is indicating an DMA Internal Error, but without any consequences. The programming sequence is as follows (as defined in the product guide PG021):

• Reset the DMA by setting the control register
• Check status register
• Set Destination address
• Allow DMA operations by setting the control register
• Start the Data Stream by writing the transfer length to the specified registers

However, as I tried to use the same bitstream with newer stable Versions of the Red Pitaya OS (for example 1.04 or 2.0) it is not working. After writing the transfer length in the specified register it takes a little while (2-3 seconds) until the Red Pitaya reboots. I tried to figure out the problem with the ILA IP Core in Vivado but when the Red Pitaya reboots also the JTAG-Connection is closed, so that I am not able to see the waveforms.

For me it seems like that the problem is caused by the Red Pitaya OS Version. Does anybody know the problem or can help me to solve it?

Best regards and thank you very much in advance for your help,

Max

[pavel]

Different versions configure the HP0 port width differently:

https://github.com/RedPitaya/RedPitaya/issues/89

If your configuration uses the HP0 port, then you may need to add code to reconfigure the width of the HP0 port to make it compatible with your configuration.

[Maximilian L]

Hello Pavel,

thank you for your reply. I tried to understand the linked post and did the following:
Before starting the DMA operations, I wrote the following registers:

Code: Select all

slcr[2] = 0xDF0D # unlock registers 
slcr[144] = 0
axi_hp[0] &= ~1;
axi_hp[5] &= ~1;

As I understand this enables 32-bit writes. But I still have the same problem, that the Red Pitaya is rebooting after staring the DMA transfer.

Because of that, I tried to use the ACP port instead of the HP0 port. This works well with the old OS Version 0.94, but I still have the same problem with newer Versions of the OS. I'm not quite sure, what I should try next...

Best regards,
Max

[redpitaya]

Hello Max,

Sorry for the late reply.

With the newest Nightly Build versions of the 2.00 OS, you should not need to modify the FPGA. We made the option available, though it is still in testing. Here is more information:
https://redpitaya.readthedocs.io/en/lat ... l#axi-mode

Just in case, please make sure you are using the latest version of the Red Pitaya FPGA project:
https://github.com/RedPitaya/RedPitaya-FPGA

I will move the topic to the FPGA topic section, where our FPGA developers can help answer the question.

Also, Pavel is very knowledgeable in this field, so his advice should come in handy.

[Maximilian L]

Hello everybody,

sorry for the late answer. I had no time for this issue the last week. But I want to give you a brief Update of my progress:

I could resolve the issue with the internal DMA error for the application with the OS Version 0.94 by correctly setting the t_last and t_keep bits. I am using the ACP bus now instead of the AXI HP bus.

By investigating the same bitstream with the OS Version 1.04 and using the ILA for debugging I can see that the data transfer is working. Also the mm2s_intout and s2mm_intout are set to 1. The last cell of my Jupyter Notebook, where the transfer length is written, indicates that it is still running after completion of the data transfer. Unfortunately, after a short time the Red Pitaya is rebooting.

Best regards,
Max

[Maximilian L]

Hello again,

I have a new update: It seems that the data transfer is working reasonably now

What I've done: I tied the IRQ_F2P[1:0]-Port of the PS to a constant 0. The DMA interrupts are only connected to an ILA. After the data transfer, I can reset the DMA by setting its control registers. For me it does not seem like a perfect solution, but for my case sufficient.

Best regards,
Max

[redpitaya]

That is great to hear!

Good luck with your projects.