Hi,
in the near future I will receive my Red Pitaya 125-10 and I am already curious about some functionality or concepts that are used....
It is regarding adding own or third party modules to the basic red pitaya fpga system.
I found this explanation on the web:
http://wiki.echopen.org/index.php/How_T ... Red_Pitaya
but it's only partially useful to me.
So what do I like to know/do -->
How can I re-synthesize the main redpitaya master project using the Xilinx Vivado 2017.2 design suite (webpack) ?
How can I add own (VHDL) modules to the FPGA?
Is this the way it is meant to be ? Or did I missunderstand the concept behind that?
Is there a nice tutorial on that?
BR
dut
RedPitaya-master project FPGA for VIVADO design recompiling?
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Re: RedPitaya-master project FPGA for VIVADO design recompil
Hi,
checkout https://redpitaya-knowledge-base.readth ... s/top.html documentation from the Red Pitaya, it will take you through the basic steps.
hope this helps
checkout https://redpitaya-knowledge-base.readth ... s/top.html documentation from the Red Pitaya, it will take you through the basic steps.
hope this helps
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