dedicated to the FPGA topics for all Red Pitaya programmers
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f5mzn
- Posts: 1
- Joined: Sun Feb 13, 2022 12:23 pm
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by f5mzn » Sun Feb 13, 2022 1:03 pm
Hi-
In order to teach myself with red pitaya, I'd like to make some tiny modifications of the sdr_transceiver_122_88 project (thanks to Pavel for providing it).
I have been able to generate the project file in order to open it in the `Vivado` GUI and I wondered what is the best way to generate the bitstream. For now, I manually modify the tcl files from the project folder (reflecting the mods I done in GUI) and then re-launch a `make NAME=sdr_transceiver_122_88 bit` (after a clean) which is quite a long and impractical process. Is there something better to do? Sorry it this is a stupid question... I might miss something obvious!
Thanks and best regards.
Olivier.
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pavel
- Posts: 721
- Joined: Sat May 23, 2015 5:22 pm
Post
by pavel » Mon Feb 14, 2022 9:14 pm
If you prefer to use the GUI, then it is possible to do all editing and bitstream generation in the Vivado GUI.
Here are the steps that I use for this type of workflow:
- build Vivado project
Code: Select all
make NAME=sdr_transceiver_122_88 PART=xc7z020clg400-1 xpr
- open project in Vivado GUI
Code: Select all
vivado tmp/sdr_transceiver_122_88.xpr
- modify project in Vivado GUI
- generate bitstream in Vivado GUI
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