Hello,
I wanted to know how the red pitaya FPGA code implements fast ADC data acquisition. i.e writing ADC data to a buffer and reading it using python. I have been trying to go over the code by making the red pitaya fpga code project in vivado. But it has been difficult to interpret. Could someone explain in simpler terms what the code does and how I can recreate it?
Thanks,
Ansh
How does the red pitaya implement data acquisition from ADCs
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Re: How does the red pitaya implement data acquisition from ADCs
Hello Ansh,
The University of Ljubljana, Laboratory for Integrated Circuits has a tutorial on this:
https://lniv.fe.uni-lj.si/redpitaya/
A very short description of the project is that the FPGA code takes samples from the ADC, modifies the data (if needed), and saves it into a buffer, which can then be accessed through a specific hardware address (register) and used by a C program.
They are using the pre-unified OS version of the FPGA, so if you have any issues, please let me know.
Are you using Jupyter Notebook or standard Python with the SCPI commands?
The University of Ljubljana, Laboratory for Integrated Circuits has a tutorial on this:
https://lniv.fe.uni-lj.si/redpitaya/
A very short description of the project is that the FPGA code takes samples from the ADC, modifies the data (if needed), and saves it into a buffer, which can then be accessed through a specific hardware address (register) and used by a C program.
They are using the pre-unified OS version of the FPGA, so if you have any issues, please let me know.
Are you using Jupyter Notebook or standard Python with the SCPI commands?
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- Posts: 5
- Joined: Fri Mar 31, 2023 4:40 pm
Re: How does the red pitaya implement data acquisition from ADCs
Hi,
Thank you very much for the replies, will make sure to post in the correct topic from the next time onwards.
Recently I discovered Anton Potočnik's tutorial 5(http://antonpotocnik.com/?p=514765). I am planning on using the method described in it and running a server side application on the redpitaya linux on C and a client side application on python and editing his FPGA code to fit my use case.
If there is a simpler way to do this by using by using os and mmap libraries in python, please let me know.
Best,
Ansh
Thank you very much for the replies, will make sure to post in the correct topic from the next time onwards.
Recently I discovered Anton Potočnik's tutorial 5(http://antonpotocnik.com/?p=514765). I am planning on using the method described in it and running a server side application on the redpitaya linux on C and a client side application on python and editing his FPGA code to fit my use case.
If there is a simpler way to do this by using by using os and mmap libraries in python, please let me know.
Best,
Ansh
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- Posts: 110
- Joined: Tue Nov 16, 2021 11:38 am
Re: How does the red pitaya implement data acquisition from ADCs
Perhaps I should give a quick rundown of the FPGA functionality regarding this topic:
To start the acquisition, we must enable it by setting the appropriate bit. (see registry map)
The acquisition is now running - decimated and calibrated ADC data are being written into an internal (circular) BRAM buffer of 2^14 samples, until a trigger arrives.
After the trigger, the desired number of samples is written into the buffer and the position of trigger within the buffer is saved.
Now, the buffer can be read out by moving through the BRAM addresses - usually from the trigger forward.
To start the acquisition, we must enable it by setting the appropriate bit. (see registry map)
The acquisition is now running - decimated and calibrated ADC data are being written into an internal (circular) BRAM buffer of 2^14 samples, until a trigger arrives.
After the trigger, the desired number of samples is written into the buffer and the position of trigger within the buffer is saved.
Now, the buffer can be read out by moving through the BRAM addresses - usually from the trigger forward.
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