Possibility of Self-Contained Signal Filter Testing on 125-14
Posted: Mon Jun 05, 2023 4:42 pm
Hello,
I am currently working on a research project using a STEMlab 125-14 where the goal is to be able to create and test (and eventually deploy) different data filtration methods for different signals.
Right now I have a trapezoidal filter created by a colleague that I know has been used with success in the past. So, starting from a simple ADC to DAC project provided by pavel (here), I placed it into the block design in between the ADC and DAC as such, let Vivado do its thing, and generated a bitstream without error (note that trap_0 has S00_AXIS data width 16, so it only takes the 16 LSB from the ADC, which I assume is from adc_dat_a_i).
My question is this: can I have this bitstream running on the STEMlab while simultaneously feeding a signal to it from the built in Signal Generator and reading the filtered signal from the built in Oscilloscope? Ideally, I would have a signal from the generator come out of OUT2, into IN1 where it gets filtered and passed out of OUT1, and finally into IN2 where I can read it from the Oscilloscope.
Optionally, I could also try having some way to command a signal generator from the Linux side (as in the Frequency Counter FPGA lesson) and then have some way to view the wave output for analysis.
Thank you in advance for any pointers anywhere within this program.
I am currently working on a research project using a STEMlab 125-14 where the goal is to be able to create and test (and eventually deploy) different data filtration methods for different signals.
Right now I have a trapezoidal filter created by a colleague that I know has been used with success in the past. So, starting from a simple ADC to DAC project provided by pavel (here), I placed it into the block design in between the ADC and DAC as such, let Vivado do its thing, and generated a bitstream without error (note that trap_0 has S00_AXIS data width 16, so it only takes the 16 LSB from the ADC, which I assume is from adc_dat_a_i).
My question is this: can I have this bitstream running on the STEMlab while simultaneously feeding a signal to it from the built in Signal Generator and reading the filtered signal from the built in Oscilloscope? Ideally, I would have a signal from the generator come out of OUT2, into IN1 where it gets filtered and passed out of OUT1, and finally into IN2 where I can read it from the Oscilloscope.
Optionally, I could also try having some way to command a signal generator from the Linux side (as in the Frequency Counter FPGA lesson) and then have some way to view the wave output for analysis.
Thank you in advance for any pointers anywhere within this program.