Saving data on SD Card from fpga (Vivado)

[javiruni10]

Hello.

I has just defined a Verilog program on Vivado that allows me to show a voltage signal on the DAC (14 bits). The program is working and displaying the correct values on the DAC, so the functional part of my design is ready.

The thing i want to achieve is saving that binary data into the SD Card (would be better to save more than 14 bits, maybe 32 would be nice).

Can i save the data directly from Vivado? Can i instantiate the SD Card through pin definition, such as we do with the DAC?

Supossing that wouldn't work, do i need to define a communication interface? Would that slow the data flow?

In other words, will that affect the FPGA functionality? Or will this data be stored in a qeue and be saved without affecting the fpga functionatily??

A example would help a lot. Thanks!!

[javiruni10]

Would be enough to save the data on the RAM (with the Deep Memory Acquisition (DMA)), if that makes sense, or any other way, and maybe acquire it later on a .txt or something like that.

So the SD is no a priority, rather any way to get the data saved.

[juretrn]

Hi, the SD card interface is part of the Zynq's PL and as such cannot be accessed from PL. The best you can do is save your data into an internal buffer (BRAM) exposed to the software or save directly to RAM through DMA. You would then have to read these buffers through a script or a C utility and save them into a file, which you can then save to SD.
As far as performance goes, it depends completely on your implementation and what are your priorities. What's the data rate? What if there is a buffer overrun? Would you be fine decimating the data? Do you want to stream data or is a single shot acquisition good enough?
As an example of a high performance DMA application, you can see our streaming app; that can stream both channels at 125MS/s into RAM; and on STEM250 it does so at 250MS/s.

[javiruni10]

Thanks for your reply!!

For a start, i would need to sample frequency values measured over a period. Working on 100 KHz maybe 1 Mhz.

My implementation could acquire just 10 different periods, saving everyone on a variable, or maybe concatenating them (so all them are saved at the end of the implementation), and then stop working.

So i would need to save like 32 bits data regs, being measured over 1 Mhz periods.

Could that be done with the stream app? Maybe some more insight on it?


Thanks again!!

[javiruni10]

Sorry for another question @juretrn .... I am making use of both INPUT CH of my RedPitaya 125-14... Can i save a FPGA processed data into DRAM or exclusively the data on INPUT Ports??

Thanks in advance.

[juretrn]

In the stream app we create a 64 bit atom which is then written into a FIFO. The atom is 4 consecutive ADC samples concatenated into one. Once we gather enough atoms (it's 16 IIRC), we create a data burst on the AXI bus and write that into RAM.
The address and size of the buffer is determined by SW. SW also controls writes and handles interrupts that come after the buffer is full. The data is double buffered - there are 2 buffers that the FPGA can write into so that one may be read and the other written into.

If I understand correctly, you would also be happy to do a single shot measurement. In that case, you can use the standard oscilloscope app (FPGA project "v0.94") in DMA mode. That does a single acquisition which acquires data into a fixed RAM buffer. Again, that concatenates 4 samples into a 64 bit atom. You must just take care that the specified acquisition length is not longer than the size of the buffer.

As for your second question, the current FPGA implementation does not perform any DSP on the acquired data and only works with raw data. If you want to acquire some custom processed data, you will have to add that yourself. But it is definitely possible to do so.