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Cluster synchronization (ADC + DAC) + Continuous Sampling

Posted: Mon Oct 02, 2017 8:54 pm
by tknopp
Hi All,

based on the awesome work of Jean Minet (https://www.koheron.com/blog/2016/11/29 ... ya-cluster) and Pavel Denim (http://pavel-demin.github.io/red-pitaya-notes/) we have build a project at:

https://github.com/tknopp/RedPitayaDAQServer

that allows to
- Synchronize the fast ADC and DAC of a cluster of Red Pitayas.
- Sample the data with up to 15.625 MSamples / s into the main memory of each Red Pitaya. From there it can be send over the network to a client computer

The synchronization is done using the daisy chain connectors (SATA) but it requires some soldering. Since the synchronization of the clocks is not sufficient we additionally use the DIO to broadcast a trigger to all Red Pitayas starting both the DAC and the ADC at exactly the same sample.

This project is not fully documented and our application (we name it daq_server) is specific for our own use case. However, with just some C and network programming skills (similar to the RedPitaya C API) it should be possible to adapt the project to your own needs.

Contributions are welcome. Especially it would be great to develop a more general server application and some Matlab/Python clients that realize fully synchronous sampling.

Best regards,

Tobias Knopp and Jonas Beuke

P.S.: Some initial documentation can be found here: https://github.com/tknopp/RedPitayaDAQServer/wiki

Re: Cluster synchronization (ADC + DAC) + Continuous Samplin

Posted: Wed Oct 04, 2017 9:51 am
by tknopp
(and sorry Pavel that I misspelled your last name, its not Demin not Denim)

Re: Cluster synchronization (ADC + DAC) + Continuous Samplin

Posted: Fri Nov 17, 2017 10:30 am
by JB
Short update: We now have a SCPI server for configuring the acquisition and downloading the data from the ring buffer. A MATLAB client has been added to make use of the SCPI server. We now plan to port this client to Python. Suggestions are welcome!

Re: Cluster synchronization (ADC + DAC) + Continuous Sampling

Posted: Tue Dec 18, 2018 7:23 pm
by fbalakirev
Very nice project!

Could you please elaborate on ADC synchronization implementation? Koheron blog only mentions DAC side unfortunately.

Re: Cluster synchronization (ADC + DAC) + Continuous Sampling

Posted: Thu Dec 20, 2018 2:11 pm
by JB
Well, in the end it is exactly the same. The clock is shared via the SATA cable and the slave RP just uses this clock. For synchronization we added a trigger that is shared with all boards via a jumper wire. The master can set this trigger and all write pointers start at the same time. This might result in some phase difference but the wavelength at 125 MHz should be 2.4 m if I am not mistaken and therefore the wire length should make not so much of a difference. And since we can only sample at 125/8 MHz, this is assumed to be no issue at all.

Re: Cluster synchronization (ADC + DAC) + Continuous Sampling

Posted: Tue Jan 08, 2019 8:21 pm
by fbalakirev
JB,

Thanks for the details!

Do you think it would be possible to export ADC clock from one Red Pitaya to another Red Pitaya directly? For example: on master RP, copy 125MHz ADC clock to one of the pairs of the extension connector E1 in programmable logic; on slave RP, move R25,R26 to location R23,R24 to clock through extension connector E2;then, connect master E1 pairto slave E2 pair directly?

Re: Cluster synchronization (ADC + DAC) + Continuous Sampling

Posted: Fri Jan 11, 2019 7:23 am
by JB
Well, I guess it should be possible. The question is: why? At least with two jumper wires you might get problems with signal degradation. SATA cables are a good choice because they are used for LVDS in their original use case.