Triggered high speed acquisition

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rudyhuezo
Posts: 1
Joined: Mon Sep 14, 2015 7:38 pm

Re: Triggered high speed acquisition

Post by rudyhuezo » Wed Dec 02, 2015 9:57 pm

Dear Grozomah (and everyone on this post),

I have tried to use your code but have been unsuccessful in getting output that makes sense. The only changes that I have made to your code is changing the trigger_voltage variable. Currently I am testing the code by using a function generator but the code is "collecting data" at seemingly wrong values. For example, I set trigger_voltage to 1V and the code triggers at some value less than 1V. Could you also explain what you mean by "[1V...~600 RP units]"?

Sorry for my lack of understanding and probably vague question but I am a complete novice when it comes to the Red Pitaya.

Amraam
Posts: 18
Joined: Fri May 20, 2016 3:55 pm

Re: Triggered high speed acquisition

Post by Amraam » Fri Mar 17, 2017 11:38 pm

I want to thank Grozomah and trollhassel for their source code.
They work very well for my application.
Last edited by Amraam on Wed Mar 22, 2017 3:59 pm, edited 3 times in total.

Amraam
Posts: 18
Joined: Fri May 20, 2016 3:55 pm

Re: Triggered high speed acquisition

Post by Amraam » Mon Mar 20, 2017 5:09 pm

Hi,

after the successful test of posted codes, my next attempt is to add also decimation 2 and to transfer data as uint16 instead of uint32.

mbr99
Posts: 1
Joined: Wed Nov 08, 2017 3:30 pm

Re: Triggered high speed acquisition

Post by mbr99 » Wed Nov 08, 2017 3:44 pm

:) i bought it ! Very sexy little machine ! ... however ,

... attempting to discover this "triggered high speed acquisition" program, the compilation phase refused to give me an executable and i wonder why : this is the error message copied from the console...

/RedPitaya/Examples/C$ make trigger
cc -g -std=gnu99 -Wall -Werror -I/opt/redpitaya/include -L/opt/redpitaya/lib trigger.c -lm -lpthread -lrp -o trigger
/tmp/ccyoGWdU.o: In function `main':
/RedPitaya/Examples/C/trigger.c:31: undefined reference to `osc_fpga_init'
/RedPitaya/Examples/C/trigger.c:42: undefined reference to `osc_fpga_set_trigger_delay'
/RedPitaya/Examples/C/trigger.c:43: undefined reference to `g_osc_fpga_reg_mem'
/RedPitaya/Examples/C/trigger.c:43: undefined reference to `g_osc_fpga_reg_mem'
/RedPitaya/Examples/C/trigger.c:46: undefined reference to `osc_fpga_reset'
/RedPitaya/Examples/C/trigger.c:53: undefined reference to `g_osc_fpga_reg_mem'
/RedPitaya/Examples/C/trigger.c:53: undefined reference to `g_osc_fpga_reg_mem'
/RedPitaya/Examples/C/trigger.c:53: undefined reference to `osc_fpga_cnv_v_to_cnt'
/RedPitaya/Examples/C/trigger.c:61: undefined reference to `osc_fpga_arm_trigger'
/RedPitaya/Examples/C/trigger.c:62: undefined reference to `osc_fpga_set_trigger'
/RedPitaya/Examples/C/trigger.c:76: undefined reference to `g_osc_fpga_reg_mem'
/RedPitaya/Examples/C/trigger.c:76: undefined reference to `g_osc_fpga_reg_mem'
/RedPitaya/Examples/C/trigger.c:80: undefined reference to `g_osc_fpga_reg_mem'
/RedPitaya/Examples/C/trigger.c:80: undefined reference to `g_osc_fpga_reg_mem'
/RedPitaya/Examples/C/trigger.c:85: undefined reference to `g_osc_fpga_reg_mem'
/tmp/ccyoGWdU.o:/RedPitaya/Examples/C/trigger.c:85: more undefined references to `g_osc_fpga_reg_mem' follow
/tmp/ccyoGWdU.o: In function `main':
/RedPitaya/Examples/C/trigger.c:87: undefined reference to `osc_fpga_get_sig_ptr'
/RedPitaya/Examples/C/trigger.c:115: undefined reference to `osc_fpga_exit'
collect2: error: ld returned 1 exit status
make: *** [trigger] Error 1
<builtin>: recipe for target 'trigger' failed


i had everything cloned from the git repository and this should have worked ?... apparently some links have been lost before the compilation.
Question : what should i have done?
Should i import some other things into the examples directory before the compilation?
Is there a specific FPGA image i should have setup before compiling?...

Did anybody experienced this before me? can you help me?

kindest regards,

mbr

koepke
Posts: 1
Joined: Tue Jun 05, 2018 4:37 pm

Re: Triggered high speed acquisition

Post by koepke » Tue Jul 03, 2018 10:13 am

Hi,

I successfully implemented the code by "Grozomah" (thanks a lot!). While the program works well when I read out and self-trigger o n e channel, I am not sure what I have to do so that I can read out both channels, each individually self-triggered. (Essentially I need time stamps both for channel A and B plus roughly a dozen ADC values around each trigger time).

I am not an expert in data acquisition. In the program, so I may be missing an obvious solution. It seems that I can choose in osc_fpga_set_trigger(triggerbit) either to trigger on channel A or on channel B but not both individually; at least I have not found a hint that I can use a bit pattern. Since I finally need to measure time correlated signals for both channels that may be up to 1 ms apart, I guess, it will not work that I trigger only on one channel and search in the memory for a correlated signal in channel B. What I tried was to run two processes, one - triggered on channel A - on the first and one - triggered on channel B - on the second CPU core. In this way, I independently fill files. This works fine for a minute or so, but then the acquisition stalls. I assume that there is a conflict of two processes addressing the same FPGA.

Does anybody have an idea on how I can use both channels on the Red Pitaya independently by setting different trigger thresholds for channel A and for channel B?

Cheers, Lutz

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