DRC rule violation error when large variables are used

[blevlab]

Hello,

I'm new to programming on the Red Pitaya and I'm having problems with the implementation step of the FIR filter program I'm trying to write. I'm working off of the red_pitaya_vivado_project.tcl and when I make my variables too large (~4kilobytes, 8 unpacked groups of 256 packed bytes each specifically) I get an error like this:

ERROR: [DRC 23-20] Rule violation (PDCY-4) CARRY4 unconnected input - CARRY input pin(s) dac_dat_b_reg[13]_i_2/DI[0] are unconnected. These pins must be connected to a signal or tied to VCC or GND when output pin dac_dat_b_reg[13]_i_2/O[1] is used.

The actual pin that's unconnected changes depending on what parts of red_pitaya_top.v I disable, but it's never a variable in the source file I made. Is the FPGA just naturally running out of space or is it something I forgot to do with the original project template?

Thanks in advance!

[Nils Roos]

That's difficult to answer without the full logs or the means to reproduce it. It may be that some specific resources are exhausted, which may have caused a logged warning in earlier stages of the process.
You said it occurs when you make your variables too large; try making them just small enough that the error does not appear and then examine the utilization report (Tab "Report", the one from "Place Design"). Maybe that tells you more.