128k sample single channel generation

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eebbhh
Posts: 1
Joined: Thu Sep 14, 2017 7:02 pm

128k sample single channel generation

Post by eebbhh » Fri Sep 15, 2017 7:57 pm

Hi,
I am new to redpitaya.
I need to generate 128k sample arbitrary waveform periodically and continuously at 125 MHz rate in a single channel.
What could be the easiest solution in this case?
I have read many posts but still I am not sure which direction to take.
Thank you.

amike88
Posts: 89
Joined: Tue Mar 29, 2016 7:41 pm

Re: 128k sample single channel generation

Post by amike88 » Wed Oct 11, 2017 11:19 am

Hi,

for that you'd have to modify the PL (FPGA) code.
You would need to increase the size of the DAC/generator buffer by factor of 8. This should not be a too difficult task, as the code is mostly parametrised and only the change of few parameters should be necessary.
However all other modules, that use RAMB module in the FPGA, must be removed.
Zynq 10 has 2.1 Mb of memory available, and you would need 128k*16 = 2.05 Mb. You can see it just fits the FPGA.

mishra.kanhaiya91
Posts: 6
Joined: Mon Aug 21, 2017 6:56 am

Re: 128k sample single channel generation

Post by mishra.kanhaiya91 » Mon Oct 30, 2017 3:00 pm

Is it possible to continuously stream a signal, meaning every cycle of transmission contains different data samples??

amike88
Posts: 89
Joined: Tue Mar 29, 2016 7:41 pm

Re: 128k sample single channel generation

Post by amike88 » Thu Nov 02, 2017 11:52 am

As is Red Pitaya does not support streaming at full speed.
The best you can do is to store 16k samples send them and write another 16k samples, however it takes a few clock samples to write a sample. To support full speed DMA would be needed.

adamS
Posts: 8
Joined: Mon Jul 09, 2018 11:25 am

Re: 128k sample single channel generation

Post by adamS » Mon Oct 22, 2018 7:35 pm

amike88 wrote:
Wed Oct 11, 2017 11:19 am
Hi,

for that you'd have to modify the PL (FPGA) code.
You would need to increase the size of the DAC/generator buffer by factor of 8. This should not be a too difficult task, as the code is mostly parametrised and only the change of few parameters should be necessary.
Hi,
I modify the "localparam RSZ = 15" in red_pitaya_asg.v and "input [ 15-1: 0] buf_addr_i" in red_pitaya_asg_ch.v ,
and then using the modified bitstream,
but the ASG output is wrong!
Do i wrong with any step?

rsvoid
Posts: 2
Joined: Wed Oct 17, 2018 9:05 pm

Re: 128k sample single channel generation

Post by rsvoid » Tue Oct 23, 2018 3:56 pm

Hi,

I have done something similar with 16 Million data points, but using the KeheronSDK.

search on github for /rsarwar87/rp-adc-dac-dma

create a txt file with the relative ADC amplitude in floating point and place it in the same directory as the test.py.

for information on how to use the tools, look at the koheron SDK documentations

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