Redpitaya Forum

Hi,
I have an OLD V1.1 RP board on which I writing some acquisition modules from scratch and have contradicting pinout information from the V1.01 schematics and also from the fpga constraint files.

The DAC and expansion header pins all agree but the ADC data lines are muddled.
e.g.
PIN Schematic xdc
ADA13 W15 V15
ADA12 T16 T15
pins for ADB are also jumbled.

Am I correct in presuming the xdc pins are corrects and no weird data shuffling goes on inside the FPGA in the default project?

Thanks.

Now sorted - Me not quite noticing ADC bit numbers starting at -2.