Externally clocking ADCs

[arparker]

I would like to interface my RP with an external analog source that requires a asymmetric clk, therefore I would need to clock both ADCs using an external clock source. My nominal clock rate would be around 25MHz +/- 4MHz. Is this possible with the current RP?

[Nils Roos]

Switching the ADC clock input to an external source requires a bit of soldering. Consult the LTC2145-14 datasheet for details about the requirements for the encode clock.

Some hints:

• the ADC's clock duty cycle stabilizer is switched off, so your external clock should have a duty cycle of 50%+-5
• the ENCode clock inputs have 0.1uF capacitors, I guess that limits you to the differential clock options since you cannot tie ENC- to ground
• 25MHz+-4 is well within the allowed range of the ADC
• all sample processing within the FPGA is clocked by the ADC clock, interfaces to other clock domains are equipped with clock synchronizers; still, I can't say for sure whether this will work with 1/5 of the original clock frequency