LVDS External Clock Input
Posted: Fri Jun 10, 2016 5:43 pm
Based on the datasheet for the LTC2145-14 (ADC) the ENC inputs can be LVDS. However, this doesn't seem to work as no sampling occurs.
I am wondering that, because of the external coupling capacitors here the Encode signals are DC coupled. Since for differential signals ENC- has to be above (at least) 200mV, then this would obviously be an issue.
However, based on the datasheet, the ENC signals are biased internally to VDD (1V8 from RP schematics). I'm a little confused if RP allows the ADC LVDS signals on the ENC's.
Please shed some light into this...
I am wondering that, because of the external coupling capacitors here the Encode signals are DC coupled. Since for differential signals ENC- has to be above (at least) 200mV, then this would obviously be an issue.
However, based on the datasheet, the ENC signals are biased internally to VDD (1V8 from RP schematics). I'm a little confused if RP allows the ADC LVDS signals on the ENC's.
Please shed some light into this...