Hi,
I am starting to hit the limits of the slow ADC bandwidth on the STEMLab 125-14. Looking at page5 of the schematics, I understand that there is an analog low-pass primarily formed by R85 and C101, yielding a cutoff frequency of
1/(2*pi*220 pF*30kOhm) = 24 kHz. I would like to increase the analog bandwidth, for example by bypassing R85 by a short, because the "slow" ADCs can be sampled at 1 MSPS. My problem is that I do not know which resistor on the board R85 (and for the other inputs R86-R88), and possibly the other related components, correspond to.
Can anyone help me out here?
Thanks a million! Leo
Change analog bandwidth of slow ADCs / XADC external inputs
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- Joined: Tue Dec 02, 2014 9:06 pm
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- Posts: 6
- Joined: Tue Dec 02, 2014 9:06 pm
Re: Change analog bandwidth of slow ADCs / XADC external inputs
Ok, I figured this out myself with a multimeter. There is a rectangular array of five times 2 resistors, 2 more resistors rotated by 90 degrees, and a capacitor on the top side of the board, near the E1 connector under the corner of the heat sink covering the FPGA that almost touches the E1 connector (note that the slow ADC pins are located on the E2 connector). The second "row" of components corresponds to the slow ADC 0, the third row to ADC1, the fourth row to ADC2, and the fifth row to ADC3 (the first row is likely for the power voltage monitor). Replacing the first "E1-most" resistor of each "row" by a short should bring the analog bandwidth from 24 to roughly 360 kHz, while changing the input impedance to 5 kOhm and the maximum safe voltages (default configuration) to +- 0.5 V, sampled with 12 bits.
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