LVTTL with the Red Pitaya Extension Connectors

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Joined: Fri Mar 13, 2020 7:29 pm

LVTTL with the Red Pitaya Extension Connectors

Post by Schrodinger1933 » Thu Apr 28, 2022 6:34 pm


I am interested in using my Red Pitaya with a device that uses 5V TTL where the Red Pitaya is only sending signals to the device. From the 7 series users guide, (ug471) it is stated HR banks are capable of using LVTTL, which would be desirable in my case. However the red pitaya extension connector page states that the extension connector pins use LVCMOS33, and the further specification I've found on the forums (post by Crt Valentincic) only discusses using different differential IO standards on E1 and E2. Does anyone have any insight onto if I can use LVTTL with the extension connector pins? I believe I should be able to, but wanted to see if the forum has any insight. Thank you for your time.

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Joined: Tue Nov 16, 2021 11:38 am

Re: LVTTL with the Red Pitaya Extension Connectors

Post by juretrn » Wed May 04, 2022 11:56 am

IO standards can be changed within the constraints file (fpga/sdc/red_pitaya.xdc).

As long as compatible 3.3 V standards are used, you should be fine.
Check the build log afterwards to see if there were any serious warnings regarding the IO during the implementation phase.

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