122-16 SDR Lab board files

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belotserm
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Joined: Tue Mar 07, 2023 8:49 pm

122-16 SDR Lab board files

Post by belotserm » Sun Mar 19, 2023 12:28 am

Hi. I'm trying to follow this example design (https://github.com/dspsandbox/FPGA-Note ... A-transfer) to get started on SoC development on Red Pitaya. Unfortunately, all examples are for STEM Lab, and refer to board files for another board. Where can I find all the relevant board files for the 122-16? There is a closed topic on this forum, but the RedPitaya admin is referring to a dead link for the board files, and I haven't found anything more recent. Thanks

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redpitaya
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Re: 122-16 SDR Lab board files

Post by redpitaya » Mon Mar 20, 2023 12:01 pm

You can use the examples on our website as a reference, the only thing that changes for you is changing a setting when running the make_file.tcl script (change the model to "Z20" as in Zyng 7020 or replace a Z10 with Z20 in the files):
https://redpitaya-knowledge-base.readth ... ject-setup

https://redpitaya.readthedocs.io/en/lat ... ng-process

This means that you would run:
make project PRJ=v0.94 MODEL=Z20
instead of:
make project PRJ=v0.94 MODEL=Z10

belotserm
Posts: 18
Joined: Tue Mar 07, 2023 8:49 pm

Re: 122-16 SDR Lab board files

Post by belotserm » Mon Mar 20, 2023 3:46 pm

What I'm trying to do is follow these examples : https://github.com/dspsandbox/FPGA-Note ... generation. They are centered around RedPitaya 125-14 board. I really like their tutorials because they show step-by-step creation of new SoC projects. As a part of project creation they use FPGA constraint files, such as red_pitaya.xdc, which used to be hosted under https://github.com/RedPitaya/RedPitaya/ ... pitaya.xdc. However, in the recent master repo structure of RedPitaya repo has changed significantly, and these constraint files can no longer be found. So my request is this: I need to have constraint files and board files for the 122-16 boards that would allow me to build a new SoC project in Vivado from scratch. Please point me to where these files are. Also, is the pinout of 125-14 Xilinx chip same as on 122-16? Can I just use constraint files (.xdc, for example) from 125-14 to generate 122-16 projects?

belotserm
Posts: 18
Joined: Tue Mar 07, 2023 8:49 pm

Re: 122-16 SDR Lab board files

Post by belotserm » Mon Mar 20, 2023 3:50 pm

To continue my previous post, for example, here is a constraint file that exist under a different branch on RedPitaya repo: https://github.com/RedPitaya/RedPitaya/ ... pitaya.xdc. However, the file doesn't say which board it is for. Is it universal, i.e. is Xilix chip pinout for 125-14 same as for 122-16?

juretrn
Posts: 107
Joined: Tue Nov 16, 2021 11:38 am

Re: 122-16 SDR Lab board files

Post by juretrn » Tue Mar 21, 2023 9:45 am

Hi, the constraint files for 122-16 and 125-14 are the same. In the latest release I have separated them so the clock constraints can be correct... but the pinouts are the same. Only the 4ADC and STEM250 have different pinouts.

FPGA files are now in their own repo on github:
https://github.com/RedPitaya/RedPitaya- ... master/sdc

belotserm
Posts: 18
Joined: Tue Mar 07, 2023 8:49 pm

Re: 122-16 SDR Lab board files

Post by belotserm » Tue Mar 21, 2023 6:52 pm

Thank you

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