125-14 4CH, high frequency clipping of LV input

[jorisvr]

I plan to use Red Pitaya 125-14 4-channel to measure a signal between -5 V and +1 V.
I am only interested in the part of the signal between -1 V and +1 V, so my plan is to measure in LV input range and just let the signal clip whenever it is below -1 V.

The specification page says: absolute maximum input voltage 30 V.
But then it also says:

The overload protection is valid for low-frequency signals. For input signals that contain frequency components beyond 1 kHz, the full-scale value defines the maximum admissible input voltage.

https://redpitaya.readthedocs.io/en/lat ... astIO.html

I would like to understand the reason for the 1 kHz limitation. My signal contains frequencies up to 1 MHz. How will this affect the overload protection in the Red Pitaya?

The schematic implies that the input filter can handle up to 30 mA. It seems to me that even at 1 MHz and 10 pF input capacitance, the input current will stay far below that limit.
So what is the specific risk in overloading the input with a high frequency signal?

Switching to HV input range will impact the noise of our measurement, so I would very much like to avoid that.

[redpitaya]

Dear jorisvr,

Thank you for writing on the forum.

Thank you for pointing this out. I spoke to the team and we need to update the absolute maximum ratings for the LV input range. The current ratings apply to the HV input voltage range.

The limiting factor is the absolute maximum input voltage of the ADC, which when recalculated to the LV inputs results in an absolute maximum +-6 V (LV settings). This settings is valid for DC voltages and may change at higher frequencies.

The ADC's input measurement range is withing +-1 V input voltage on the LV settings. Going outside this results in ADC saturation, which will affect the measurements, especially at high frequencies.
I highly recommend adding a clipping circuit, which limits the negative voltage to -1 V (or close to it) as this will prevent the ADC from entering saturation. The clipping circuit will affect the measurements, but the effect should be far less than the ADC saturation.

You can check the ADC specifications for the saturation impact: https://redpitaya.readthedocs.io/en/lat ... components

Please let me know if you have any questions.

[jorisvr]

Thank you for answering my question.

The limiting factor is the absolute maximum input voltage of the ADC, which when recalculated to the LV inputs results in an absolute maximum +-6 V (LV settings).

Ok, but why though? The input signal does not go straight to the ADC. It first goes to an AD8066 opamp, which (hopefully) clips the signal to a range that is safe for the ADC. The AD8066 itself should easily be able to withstand 30 V DC with 1 MOhm series resistance.

So it seems to me that 30 V DC is safe, unless the AD8066 and the subsequent filter are capable of driving the ADC outside safe limits. I have not been able to find schematics for that part of the input circuit, so I appreciate any insight you can provide.

This older answer also says that 30 V rating should be safe viewtopic.php?t=25232

This settings is valid for DC voltages and may change at higher frequencies.

Which was really the topic of my question: How does it change with frequency and why?
I understand that saturating the ADC will affect the measurement, but I'd like to know that the board will survive my fast -5 V input signal.

[redpitaya]

The input attenuator consists of a resistor and capacitor divider. At low frequencies the resistor divider is active (two 500 kOhm resistors), halving the input voltage to the op amp (with an absolute maximum input voltage of +-Vs (the power supply is 3V3)). Then, at about 10 kHz, the current starts to flow through the capacitor divider instead (together with the op-amp input capacitance, this consists of 14.7 pF and 14.5 pF capacitors), which have a frequency-dependent impedance that is about - 10.8 kOhm at 1 MHz and even lower at higher frequencies.

The resistors do nothing to limit the voltage/current at high frequencies.

The op. amp. is capable of withstanding a maximum of approx. +-6 V (to be on the safe side) at low frequencies (up to 1 kHz). If a higher voltage is applied, the op. amp. inputs get burnt as the input voltage exceeds the supply voltage. Once the op. amp. inputs are burnt, the information read by the ADC is inaccurate.

Technically speaking +-5 V should still be OK, but it will impact the measurements.You can see the LT spice simulation results over here: https://imgur.com/a/7meCRGI
The first picture is without op amp input capacitance and the second takes into account the op amp common mode capacitance.

[jorisvr]

The op. amp. is capable of withstanding a maximum of approx. +-6 V (to be on the safe side) at low frequencies (up to 1 kHz). If a higher voltage is applied, the op. amp. inputs get burnt as the input voltage exceeds the supply voltage.

Ok, I understand. We don't want to burn the amp. I was initially reassured by the following text in the AD8066 datasheet:

If the inputs of the amplifier are to be subjected to sustained differential voltages greater than 0.7 V, or to input voltages beyond the amplifier power supply, input current should be limited to 30 mA by an appropriately sized input resistor Ri as shown ...

It suggested to me that the opamp is fine as long as input current is below 30 mA. I assumed this was the reason why the Red Pitaya specs originally stated the 30 V damage rating even at the LV setting. But from your explanation, I understand that you recommend to just never stress the opamp beyond its supply voltage, which makes sense.

You can see the LT spice simulation results over here:

Ah, thanks. Looking at the capacitive voltage divider, not taking into account amplifier capacitance, the voltage on the opamp is about 0.6 times the input level at high frequency. So if +- 6 V is safe for DC, then +- 5 V is safe for high frequency signals.

This answers my question. My -5 V input signal is safe for the Red Pitaya (although just barely).

Thanks for your help!